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In photolithography, several masks are used in turn, each one reproducing a layer of the completed design, and together known as a mask set. A curvilinear photomask has patterns with curves, which is a departure from conventional photomasks which only have patterns that are completely vertical or horizontal, known as manhattan geometry.
Layout view of a simple CMOS operational amplifier. In integrated circuit design, integrated circuit (IC) layout, also known IC mask layout or mask design, is the representation of an integrated circuit in terms of planar geometric shapes which correspond to the patterns of metal, oxide, or semiconductor layers that make up the components of the integrated circuit.
In a mask aligner, there is a one-to-one correspondence between the mask pattern and the wafer pattern. The mask covers the entire surface of the wafer which is exposed in its entirety in one shot. This was the standard for the 1:1 mask aligners that were succeeded by steppers and scanners with reduction optics. [4]
Australian law refers to mask works as "eligible layouts" or ELs. [2] In Canada these rights are protected under the [Integrated Circuit Topography Act (1990, c. 37)]. In the European Union, a sui generis design right protecting the design of materials was introduced by the Directive 87/54/EEC which is transposed in all member states.
The term tapeout currently is used to describe the creation of the photomask itself from the final approved electronic CAD file. Designers may use this term to refer to the writing of the final file to disk or CD and its subsequent transmission to the semiconductor foundry; however, in current practice the foundry will perform checks and make modifications to the mask design specific to the ...
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