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  2. Physical Address Extension - Wikipedia

    en.wikipedia.org/wiki/Physical_Address_Extension

    The Linux kernel includes full PAE-mode support starting with version 2.3.23, [24] in 1999 enabling access of up to 64 GB of memory on 32-bit machines. A PAE-enabled Linux kernel requires that the CPU also support PAE. The Linux kernel supports PAE as a build option and major distributions provide a PAE kernel either as the default or as an option.

  3. Executable-space protection - Wikipedia

    en.wikipedia.org/wiki/Executable-space_protection

    The 32-bit PAE desktop kernel (linux-image-generic-pae) in Ubuntu 9.10 and later, also provides the PAE mode needed for hardware with the NX CPU feature. For systems that lack NX hardware, the 32-bit kernels now provide an approximation of the NX CPU feature via software emulation that can help block many exploits an attacker might run from ...

  4. Control register - Wikipedia

    en.wikipedia.org/wiki/Control_register

    If PAE is enabled or the processor is in x86-64 long mode this bit is ignored. [14] 5: PAE: Physical Address Extension: If set, changes page table layout to translate 32-bit virtual addresses into extended 36-bit physical addresses. 6: MCE: Machine Check Exception: If set, enables machine check interrupts to occur. 7: PGE: Page Global Enabled

  5. 3 GB barrier - Wikipedia

    en.wikipedia.org/wiki/3_GB_barrier

    PAE is a modification of the protected mode address translation scheme which allows virtual or linear addresses to be translated to 36-bit physical addresses, instead of the 32-bit addresses available without PAE. [6] The CPU pinouts likewise provide 36 bits of physical address lines to the motherboard. [7]

  6. PCI configuration space - Wikipedia

    en.wikipedia.org/wiki/PCI_configuration_space

    One of the major improvements the PCI Local Bus had over other I/O architectures was its configuration mechanism. In addition to the normal memory-mapped and I/O port spaces, each device function on the bus has a configuration space, which is 256 bytes long, addressable by knowing the eight-bit PCI bus, five-bit device, and three-bit function numbers for the device (commonly referred to as the ...

  7. Address space layout randomization - Wikipedia

    en.wikipedia.org/wiki/Address_space_layout...

    Address space layout randomization (ASLR) is a computer security technique involved in preventing exploitation of memory corruption vulnerabilities. [1] In order to prevent an attacker from reliably redirecting code execution to, for example, a particular exploited function in memory, ASLR randomly arranges the address space positions of key data areas of a process, including the base of the ...

  8. Protected mode - Wikipedia

    en.wikipedia.org/wiki/Protected_mode

    In computing, protected mode, also called protected virtual address mode, [1] is an operational mode of x86-compatible central processing units (CPUs). It allows system software to use features such as segmentation, virtual memory, paging and safe multi-tasking designed to increase an operating system's control over application software.

  9. NX bit - Wikipedia

    en.wikipedia.org/wiki/NX_bit

    The NX bit (no-execute) is a technology used in CPUs to segregate areas of a virtual address space to store either data or processor instructions. An operating system with support for the NX bit may mark certain areas of an address space as non-executable. The processor will then refuse to execute any code residing in these areas of the address ...