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AMD announced the Brazos-T platform on 9 October 2012. It comprised the 4.5-watt AMD Z-Series APU (codenamed Hondo) and the A55T Fusion Controller Hub (FCH), designed for the tablet computer market. [42] [43] The Hondo APU is a redesign of the Desna APU. AMD lowered energy use by optimizing the APU and FCH for tablet computers. [44] [45]
Dual-channel (2× 64 Bit) DDR3 memory controller. Integrated custom ARM Cortex-A5 co-processor [ 45 ] with TrustZone Security Extensions [ 46 ] in select APU models, except the Performance APU models.
AMD Excavator Family 15h is a microarchitecture developed by AMD to succeed Steamroller Family 15h for use in AMD APU processors and normal CPUs. On October 12, 2011, AMD revealed Excavator to be the code name for the fourth-generation Bulldozer-derived core. The Excavator-based APU for mainstream applications is called Carrizo and was released ...
Architecture Fabrication (nm) Family Release Date Code name Model Group Cores SMT Clock rate () Bus Speed & Type [a] Cache Socket Memory Controller Features L1 L2
Llano AMD Fusion (K10 cores + Redwood-class GPU) (launch Q2 2011, this is the first AMD APU) uses Socket FM1 Bulldozer architecture; Bulldozer, Piledriver, Steamroller, Excavator (2011–2017) [ edit ]
Zen 4 is the first AMD microarchitecture to support AVX-512 instruction set extension. Most 512-bit vector instructions are split in two and executed by the 256-bit SIMD execution units internally. The two halves execute in parallel on a pair of execution units and are still tracked as a single micro-OP (except for stores), which means the ...
After Advanced Micro Devices, Inc. (NASDAQ:AMD) fell steadily from the $15-level to trade at around the $10-mark in the last few days, investors should best focus on two events. Second, Ryzen’s ...
AMD Steamroller Family 15h is a microarchitecture developed by AMD for AMD APUs, which succeeded Piledriver in the beginning of 2014 as the third-generation Bulldozer-based microarchitecture. [2] Steamroller APUs continue to use two-core modules as their predecessors, while aiming at achieving greater levels of parallelism.