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The static qualifier differentiates SRAM from dynamic random-access memory (DRAM): SRAM will hold its data permanently in the presence of power, while data in DRAM decays in seconds and thus must be periodically refreshed. SRAM is faster than DRAM but it is more expensive in terms of silicon area and cost.
DRAM cell area is given as nF 2, where n is a number derived from the DRAM cell design, and F is the smallest feature size of a given process technology. This scheme permits comparison of DRAM size over different process technology generations, as DRAM cell area scales at linear or near-linear rates with respect to feature size.
SRAM consists of a series of transistors arranged in a flip-flop, which will hold one of two states as long as power is applied. Since the transistors have a very low power requirement, their switching time is very low. However, since an SRAM cell consists of several transistors, typically four or six, its density is much lower than DRAM.
Hitachi's 16 Mb SRAM memory chip in 1993. [47] Hitachi and NEC introduced 256 Mb DRAM memory chips manufactured with this process in 1993, followed by Matsushita, Mitsubishi Electric and Oki in 1994. [47] NEC's 1 Gb DRAM memory chip in 1995. [47] Hitachi's 128 Mb NAND flash memory chip in 1996. [47]
Non-volatile random-access memory (NVRAM) is random-access memory that retains data without applied power. This is in contrast to dynamic random-access memory (DRAM) and static random-access memory (SRAM), which both maintain data only for as long as power is applied, or forms of sequential-access memory such as magnetic tape, which cannot be randomly accessed but which retains data ...
Due to its one-transistor bit cell, 1T-SRAM is smaller than conventional (six-transistor, or "6T") SRAM, and closer in size and density to embedded DRAM . At the same time, 1T-SRAM has performance comparable to SRAM at multi-megabit densities, uses less power than eDRAM and is manufactured in a standard CMOS logic process like conventional SRAM.
The lower limit to this scaling process is an important point of comparison. In general, the technology that scales to the smallest cell size will end up being the least expensive per bit. In terms of construction, FeRAM and DRAM are similar, and can in general be built on similar lines at similar sizes.
Reduced Latency DRAM (RLDRAM) is a type of specialty dynamic random-access memory (DRAM) with a SRAM-like interface originally developed by Infineon Technologies.It is a high-bandwidth, semi-commodity, moderately low-latency (relative to contemporaneous SRAMs) memory targeted at embedded applications (such as computer networking equipment) requiring memories that have moderate costs and low ...