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  2. List of AMD chipsets - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_chipsets

    The UMI interface previously used by AMD for communicating with the FCH is replaced with a PCIe connection. Technically the processor can operate without a chipset; it only continues to be present for interfacing with low speed I/O. AMD server CPUs adopt a self contained system on chip design instead which doesn't require a chipset. [11] [12 ...

  3. Template:AM4 chipsets - Wikipedia

    en.wikipedia.org/wiki/Template:AM4_chipsets

    PCIe support [a] Multi-GPU USB support [b] Storage features Processor overclocking TDP CPU support Architecture Part number CrossFire SLI SATA ports RAID AMD StoreMI Excavator Zen Zen+ Zen 2 Zen 3; A300 Feb 2017: None Untested None None Yes [1] No [2] No ~120 μW [c] No Yes [3] [4] Knoll Express [5] 100-CG2978 218-0892000 KNOLL1 X300 Yes Yes [6 ...

  4. Socket AM4 - Wikipedia

    en.wikipedia.org/wiki/Socket_AM4

    The X370 chipset supports multiple graphics cards. But the number of available PCIe lanes depends on the CPU/APU. Support for Zen (including Zen+, Zen 2 and Zen 3) based family of CPUs and APUs (Ryzen, Athlon), as well as for some A-Series APUs and Athlon X4 CPUs (Bristol Ridge based on the Excavator microarchitecture) Supports PCIe 3.0 [12 ...

  5. List of AMD processors - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_processors

    Zen 5 series CPUs and APUs (released 2024) Granite Ridge Ryzen 9000 series (desktop) Strix Point Ryzen AI 300 series (laptop) Turin Epyc 9005 series (server)

  6. Table of AMD processors - Wikipedia

    en.wikipedia.org/wiki/Table_of_AMD_processors

    Architecture Fabrication (nm) Family Release Date Code name Model Group Cores SMT Clock rate () Bus Speed & Type [a] Cache Socket Memory Controller Features L1 L2

  7. List of AMD Ryzen processors - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_Ryzen_processors

    Threadripper CPUs support DDR5-5200 in quad-channel mode while Threadripper PRO CPUs support DDR5-5200 in octa-channel mode with ECC support. L1 cache: 64 KB (32 KB data + 32 KB instruction) per core. L2 cache: 1 MB per core. Threadripper CPUs support 48 PCIe 5.0 and 24 PCIe 4.0 lanes while Threadripper PRO CPUs support 128 PCIe 5.0 lanes. In ...

  8. Comparison of CPU microarchitectures - Wikipedia

    en.wikipedia.org/wiki/Comparison_of_CPU_micro...

    Superscalar, out-of-order execution, 6 execution units, SMP support PowerPC 620: 1997 5 Out-of-order execution, SMP support PWRficient PA6T 2007 Superscalar, out-of-order execution, 6 execution units R4000: 1991 8 Scalar StrongARM SA-110: 1996 5 Scalar, in-order SuperH SH2: 5 SuperH SH2A: 2006 5 Superscalar, Harvard architecture SPARC ...

  9. Zen 3 - Wikipedia

    en.wikipedia.org/wiki/Zen_3

    As the first largely "ground up redesign" of the Zen CPU core since the architecture family's original release in early 2017 with Zen 1/Ryzen 1000, Zen 3 was a significant architectural improvement over its predecessors; having a very significant IPC increase of +19% over the prior Zen 2 architecture in addition to being capable of reaching higher clock speeds.

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