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Xbox 360 was the first high-definition gaming console to utilize the ATI Technologies 256-bit GPU Xenos [2] before the introduction of the current gaming consoles especially Nintendo Switch. Some buses on the newer System on a chip (e.g. Tegra developed by Nvidia) utilize 64-bit, 128-bit, 256-bit, or higher.
The GeForce 256 is the original release in Nvidia's "GeForce" product line.Announced on August 31, 1999 and released on October 11, 1999, the GeForce 256 improves on its predecessor by increasing the number of fixed pixel pipelines, offloading host geometry calculations to a hardware transform and lighting (T&L) engine, and adding hardware motion compensation for MPEG-2 video.
The DEC VAX supported operations on 128-bit integer ('O' or octaword) and 128-bit floating-point ('H-float' or HFLOAT) datatypes. Support for such operations was an upgrade option rather than being a standard feature. Since the VAX's registers were 32 bits wide, a 128-bit operation used four consecutive registers or four longwords in memory.
The 2D graphics core was later used in the ViRGE/DX and ViRGE/GX. Like the corresponding ViRGE chips, the 64V2 also came in /DX and /GX variants, with the latter supporting more modern SDRAM or SGRAM. The final version, called the Trio3D, was effectively the 128-bit successor to the ViRGE/GX2. S3 Trio 3D/2X
AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first implemented in the 2016 Intel Xeon Phi x200 (Knights Landing), [1] and then later in a number of AMD and other Intel CPUs (see list below).
Register file size is also increasing over different GPU generations, e.g., the total register file size on Maxwell (GM200), Pascal and Volta GPUs are 6 MiB, 14 MiB and 20 MiB, respectively. [31] [32] By comparison, the size of a register file on CPUs is small, typically tens or hundreds of kilobytes.
The Imagine 128 GPU introduced a full 128-bit graphics processor—GPU, internal processor bus, and memory bus were all 128 bits. However, there was no, or very little, hardware support for 3D graphics operations. [15] The Imagine 128-II added Gouraud shading, 32-bit Z-buffering, double display buffering, and a 256-bit video rendering engine. [16]
As of July 2017, the Graphics Core Next instruction set has seen five iterations. The differences between the first four generations are rather minimal, but the fifth-generation GCN architecture features heavily modified stream processors to improve performance and support the simultaneous processing of two lower-precision numbers in place of a single higher-precision number.