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  2. CUDA - Wikipedia

    en.wikipedia.org/wiki/CUDA

    Warp-level support for reduction ops L2 cache residency management DPX instructions for accelerated dynamic programming No Yes Distributed shared memory Thread block cluster Tensor memory accelerator (TMA) unit Feature support (unlisted features are supported for all compute capabilities) 1.0,1.1 1.2,1.3 2.x 3.0 3.2 3.5, 3.7, 5.x, 6.x, 7.0, 7.2