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The first published version was the 32-bit SPARC version 7 (V7) in 1986. SPARC version 8 (V8), an enhanced SPARC architecture definition, was released in 1990. The main differences between V7 and V8 were the addition of integer multiply and divide instructions, and an upgrade from 80-bit "extended-precision" floating-point arithmetic to 128-bit ...
The Sparcle is an experimental 32-bit microprocessor chip developed in 1992 by a consortium of MIT, LSI Corporation, and Sun Microsystems.It was an evolution Sun's SPARC RISC architecture with features geared towards "large-scale multiprocessing". [1]
ERC32 is a radiation-tolerant 32-bit RISC processor (SPARC V7 specification) developed for space applications. It was developed by Temic, which was later acquired by Atmel and then Microchip.
VIS re-uses existing SPARC V9 64-bit floating point registers to hold multiple 8, 16, or 32-bit integer values. In this respect, VIS is more similar to the design of MMX than other SIMD architectures such as SSE/SSE2/AltiVec. VIS includes a number of operations primarily for graphics support, so most of them are only for integers.
Solaris (Solaris 2.1 to 9; Solaris 10 dropped support for 32-bit SPARC systems.) Linux; NetBSD/SPARC; OpenBSD/sparc32 - All versions up to 5.9 (OpenBSD 5.9 was the last release to support SPARC32 [5]) NeXTSTEP (SuperSPARC CPU modules only) OPENSTEP/Mach (SuperSPARC CPU modules only)
(U for UltraSPARC) - this variant introduced the 64-bit SPARC V9 processor architecture and UPA processor interconnect first used in the Sun Ultra series. Supported by 32-bit versions of Solaris from the version 2.5. The first 64-bit Solaris release for Sun4u is Solaris 7. UltraSPARC I support was dropped after Solaris 9.
The integer register file has 32 64-bit entries. As the SPARC ISA uses register windows, of which the UltraSPARC has eight, the actual number of registers is 144. The register file has seven read and three write ports.
A 32-bit version of the 801 was eventually produced in a single-chip form as the IBM ROMP in 1981, which stood for 'Research OPD [Office Products Division] Micro Processor'. [15] This CPU was designed for "mini" tasks, and found use in peripheral interfaces and channel controllers on later IBM computers.