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  2. MCS-51 - Wikipedia

    en.wikipedia.org/wiki/MCS-51

    The Intel MCS-51 (commonly termed 8051) is a single-chip microcontroller (MCU) series developed by Intel in 1980 for use in embedded systems.The architect of the Intel MCS-51 instruction set was John H. Wharton.

  3. Orthogonal instruction set - Wikipedia

    en.wikipedia.org/wiki/Orthogonal_instruction_set

    [8] In contrast to the PDP-11's 3-bit fields, the VAX-11's 4-bit sub-bytes resulted in 16 addressing modes (0–15). However, addressing modes 0–3 were "short immediate" for immediate data of 6 bits or less (the 2 low-order bits of the addressing mode being the 2 high-order bits of the immediate data, when prepended to the remaining 4 bits in ...

  4. Stack register - Wikipedia

    en.wikipedia.org/wiki/Stack_register

    These first instruction shall push the value stored in AX (16-bit register) to the stack. This is done by subtracting a value of 2 (2 bytes) from SP. The new value of SP becomes 0xF81E. The CPU then copies the value of AX to the memory word whose physical address is 0x1F81E. When "PUSH BX" is executed, SP is set to 0xF81C and BX is copied to ...

  5. FLAGS register - Wikipedia

    en.wikipedia.org/wiki/FLAGS_register

    The ability to push and pop FLAGS registers lets a program manipulate information in the FLAGS in ways for which machine-language instructions do not exist. For example, the cld and std instructions clear and set the direction flag (DF), respectively; but there is no instruction to complement DF. This can be achieved with the following assembly ...

  6. Stack (abstract data type) - Wikipedia

    en.wikipedia.org/wiki/Stack_(abstract_data_type)

    Simple representation of a stack runtime with push and pop operations. In computer science, a stack is an abstract data type that serves as a collection of elements with two main operations: Push, which adds an element to the collection, and; Pop, which removes the most recently added element.

  7. x86 instruction listings - Wikipedia

    en.wikipedia.org/wiki/X86_instruction_listings

    Differs from older variants of conditional jumps in that they accept a 16/32-bit offset rather than just an 8-bit offset. IMUL r, r/m: 0F AF /r: Two-operand non-widening integer multiply. FS: 64: Segment-override prefixes for FS and GS segment registers. 3 GS: 65: PUSH FS: 0F A0: Push/pop FS and GS segment registers. POP FS: 0F A1: PUSH GS: 0F ...

  8. Addressing mode - Wikipedia

    en.wikipedia.org/wiki/Addressing_mode

    The stepping of an address past data used, similar to *p++ in the C programming language, used for stack pop operations. Pre decrement The decrementing of an address prior to use, similar to *--p in the C programming language , used for stack push operations.

  9. x86 memory segmentation - Wikipedia

    en.wikipedia.org/wiki/X86_memory_segmentation

    The choice of segment is normally defaulted by the processor according to the function being executed. Instructions are always fetched from the code segment. Any stack push or pop or any data reference referring to the stack uses the stack segment. All other references to data use the data segment.