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triple 3-input NOR gate 14 SN74LS27: 74x28 4 quad 2-input NOR gate driver N O =30 14 SN74LS28: 74x29 2 dual 4-input NOR gate 14 US7429A: 74x30 1 single 8-input NAND gate 14 SN74LS30: 74x31 6 hex delay elements (two 6ns, two 23-32ns, two 45-48ns) 16 SN74LS31: 74x32 4 quad 2-input OR gate: 14 SN74LS32: 74x33 4 quad 2-input NOR gate open-collector ...
In the popular CMOS and TTL logic families, NOR gates with up to 8 inputs are available: CMOS. 4001: Quad 2-input NOR gate; 4025: Triple 3-input NOR gate; 4002: Dual 4-input NOR gate; 4078: Single 8-input NOR gate; TTL. 7402: Quad 2-input NOR gate; 7427: Triple 3-input NOR gate; 7425: Dual 4-input NOR gate (with strobe, obsolete) 74260: Dual 5 ...
The first part number in the series, the 7400, is a 14-pin IC containing four two-input NAND gates. Each gate uses two input pins and one output pin, with the remaining two pins being power (+5 V) and ground. This part was made in various through-hole and surface-mount packages, including flat pack and plastic/ceramic dual in-line.
A single NOR gate. A NOR gate or a NOT OR gate is a logic gate which gives a positive output only when both inputs are negative.. Like NAND gates, NOR gates are so-called "universal gates" that can be combined to form any other kind of logic gate.
I2L NOR gate with two inputs, two outputs, and one voltage input for the current injector transistor. The I2L inverter gate is constructed with a PNP common base current source transistor and an NPN common emitter open collector inverter transistor (i.e. they are connected to the GND). On a wafer, these two transistors are merged.
A CMOS transistor NAND element. V dd denotes positive voltage.. In CMOS logic, if both of the A and B inputs are high, then both the NMOS transistors (bottom half of the diagram) will conduct, neither of the PMOS transistors (top half) will conduct, and a conductive path will be established between the output and Vss (ground), bringing the output low.
AND-OR-invert (AOI) logic and AOI gates are two-level compound (or complex) logic functions constructed from the combination of one or more AND gates followed by a NOR gate (equivalent to an OR gate through an Inverter gate, which is the "OI" part of "AOI").
See also: Diode logic § Active-high OR logic gate. The wired OR connection electrically performs the Boolean logic operation of an OR gate using open emitter or similar inputs (which can be identified by the ⎏ symbol in schematics) connected to a shared output with a pull-down resistor. This gate can also be easily extended with more inputs.
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