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The R2000 is a 32-bit microprocessor chip set developed by MIPS Computer Systems that implemented the MIPS I instruction set architecture (ISA). Introduced in January 1986, it was, by a few months, the first commercial implementation of the RISC architecture.
Pipelined MIPS, showing the five stages: instruction fetch, instruction decode, execute, memory access and write back. The first MIPS microprocessor, the R2000, was announced in 1985. It added multiple-cycle multiply and divide instructions in a somewhat independent on-chip unit.
The first version of the MIPS architecture was designed by MIPS Computer Systems for its R2000 microprocessor, the first MIPS implementation. Both MIPS and the R2000 were introduced together in 1985. [11] [failed verification] When MIPS II was introduced, MIPS was renamed MIPS I to distinguish it from the new version. [3]: 32
This is a list of processors that implement the MIPS instruction set architecture, sorted by year, process size, frequency, die area, and so on. These processors are designed by Imagination Technologies, MIPS Technologies, and others.
The MIPS system was followed by the MIPS-X and in 1984 Hennessy and his colleagues formed MIPS Computer Systems to produce the design commercially. [ 25 ] [ 26 ] The venture resulted in a new architecture that was also called MIPS and the R2000 microprocessor in 1985.
MIPS Computer Systems Inc. was founded in 1984 [11] by a group of researchers from Stanford University including John L. Hennessy and Chris Rowen.These researchers had worked on a project called MIPS (for Microprocessor without Interlocked Pipeline Stages), one of the projects that pioneered the RISC concept.
The first commercial RISC microprocessor design was released in 1984, by MIPS Computer Systems, the 32-bit R2000 (the R1000 was not released). In 1986, HP released its first system with a PA-RISC CPU.
R2000 or R-2000 might refer to: R2000 (microprocessor), a microprocessor developed by MIPS Computer Systems; Pratt & Whitney R-2000, an aircraft engine;