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  2. Serial Peripheral Interface - Wikipedia

    en.wikipedia.org/wiki/Serial_Peripheral_Interface

    A Queued Serial Peripheral Interface (QSPI; different to but has same abbreviation as Quad SPI described in § Quad SPI) is a type of SPI controller that uses a data queue to transfer data across an SPI bus. [19] It has a wrap-around mode allowing continuous transfers to and from the queue with only intermittent attention from the CPU.

  3. Peripheral Sensor Interface 5 - Wikipedia

    en.wikipedia.org/wiki/Peripheral_Sensor_Interface_5

    Following the goal of an open interface standard, PSI5 was developed on the basis of existing proprietary implementations of companies Autoliv, Bosch and Continental.A first common publication was released at the "Sensor" trade fair in Nuremberg in May 2005.

  4. Synchronous Serial Interface - Wikipedia

    en.wikipedia.org/wiki/Synchronous_Serial_Interface

    Synchronous Serial Interface (SSI) is a widely used serial interface standard for industrial applications between a master (e.g. controller) and a slave (e.g. sensor). SSI is based on RS-422 [1] standards and has a high protocol efficiency in addition to its implementation over various hardware platforms, making it very popular among sensor manufacturers.

  5. AVR microcontrollers - Wikipedia

    en.wikipedia.org/wiki/AVR_microcontrollers

    Atmel provides a series of JTAG adapters for the AVR: The Atmel-ICE [28] is the latest adapter. It supports JTAG, debugWire, aWire, SPI, TPI, and PDI interfaces. The JTAGICE 3 [29] is a midrange debugger in the JTAGICE family (JTAGICE mkIII). It supports JTAG, aWire, SPI, and PDI interfaces. The JTAGICE mkII [30] replaces the JTAGICE and is ...

  6. Pmod Interface - Wikipedia

    en.wikipedia.org/wiki/Pmod_Interface

    Pmods come with a standard 6-pin interface of 4 signals, one ground and one power pin. Double and quad Pmods also exist. These duplicate the standard interface to allow more signals to pass through to the module. Pmods can use either SPI, I 2 C or UART protocol. With I 2 C it is possible to use a 4-pin connector. Alternatively the pins 1 to 4 ...

  7. NXP LPC - Wikipedia

    en.wikipedia.org/wiki/NXP_LPC

    ROM size of 64 KB, which contains a boot loader with optional booting from USART0 / USART3, USB0 / USB1, SPI Flash, Quad SPI Flash, external 8 / 16/ 32-bit NOR flash. The ROM also contains an API for in-system programming, in-application programming, OTP programming, USB device stack for HID / MSC / DFU.

  8. Peripheral Interface Adapter - Wikipedia

    en.wikipedia.org/wiki/Peripheral_Interface_Adapter

    A Peripheral Interface Adapter (PIA) is a peripheral integrated circuit providing parallel I/O interfacing for microprocessor systems. MOS 6520. PIA pin configuration

  9. IEEE 1394 - Wikipedia

    en.wikipedia.org/wiki/IEEE_1394

    IEEE 1394 is an interface standard for a serial bus for high-speed communications and isochronous real-time data transfer. It was developed in the late 1980s and early 1990s by Apple in cooperation with a number of companies, primarily Sony and Panasonic.