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The Intel 8085 ("eighty-eighty-five") is an 8-bit microprocessor produced by Intel and introduced in March 1976. [2] It is the last 8-bit microprocessor developed by Intel. It is software-binary compatible with the more-famous Intel 8080 with only two minor instructions added to support its added interrupt and serial input/output features.
The Intel 8085 CPU used a 6.144 MHz crystal, resulting in the processor operating at 3.072 MHz. The basic system had 256 bytes of RAM and 2048 bytes of ROM.The base system also had cassette tape IO, serial IO which could be configured for RS-232 or current loop, and thirty eight bits of parallel IO.
Program memory is read-only, though some variants of the 8051 use on-chip flash memory and provide a method of re-programming the memory in-system or in-application. In addition to code, it is possible to store read-only data such as lookup tables in program memory, retrieved by the MOVC A , @ A + DPTR or MOVC A , @ A + PC instructions.
The instruction set architecture (ISA) that the computer final version (SAP-3) is designed to implement is patterned after and upward compatible with the ISA of the Intel 8080/8085 microprocessor family. Therefore, the instructions implemented in the three SAP computer variations are, in each case, a subset of the 8080/8085 instructions.
In a system using segmentation, computer memory addresses consist of a segment id and an offset within the segment. [3] A hardware memory management unit (MMU) is responsible for translating the segment and offset into a physical address, and for performing checks to make sure the translation can be done and that the reference to that segment and offset is permitted.
Examples include the Intel 8080, Intel 8085, Zilog Z80, Motorola 6800, Microchip PIC18, and many others. These processors have 8-bit CPUs with 8-bit data and 16-bit addressing. The memory on these CPUs is addressable at the byte level. This leads to a memory addressable limit of 2 16 × 1 byte = 65,536 bytes or 64 kilobytes.
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The FLAGS register is the status register that contains the current state of an x86 CPU.The size and meanings of the flag bits are architecture dependent. It usually reflects the result of arithmetic operations as well as information about restrictions placed on the CPU operation at the current time.