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The Intel MCS-51 (commonly termed 8051) is a single-chip microcontroller (MCU) series developed by Intel in 1980 for use in embedded systems. The architect of the Intel MCS-51 instruction set was John H. Wharton. [1] [2] Intel's original versions were popular in the 1980s and early 1990s, and enhanced binary compatible derivatives remain ...
It is primarily used to support binary-coded decimal (BCD) arithmetic. The Auxiliary Carry flag is set (to 1) if during an " add " operation there is a carry from the low nibble (lowest four bits) to the high nibble (upper four bits), or a borrow from the high nibble to the low nibble, in the low-order 8-bit portion, during a subtraction.
The 8051 microcontroller has two, a primary accumulator and a secondary accumulator, where the second is used by instructions only when multiplying (MUL AB) or dividing (DIV AB); the former splits the 16-bit result between the two 8-bit accumulators, whereas the latter stores the quotient on the primary accumulator A and the remainder in the ...
A subtract with borrow (SBB) instruction will compute a−b−C = a−(b+C), while a subtract without borrow (SUB) acts as if the borrow bit were clear. The 8080, 6800, Z80, 8051, x86 [2] and 68k families (among others) use a borrow bit.
The FLAGS register is the status register that contains the current state of an x86 CPU.The size and meanings of the flag bits are architecture dependent. It usually reflects the result of arithmetic operations as well as information about restrictions placed on the CPU operation at the current time.
A complex instruction set computer (CISC / ˈ s ɪ s k /) is a computer architecture in which single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or are capable of multi-step operations or addressing modes within single instructions.
Also, different status registers are mapped into the SFR, for use in checking the status of the 8051, and changing some operational parameters of the 8051. Some SFR bits may be set directly using SETB/LDB instructions on the SFR's address, whereas others may require usage of specific instructions.
Arithmetic and logical instructions were mostly performed against values in memory as opposed to internal registers. As a result, many instructions required a two-byte (16-bit) location to memory. Given that opcodes on these processors were only one byte (8 bits) in length, memory addresses could make up a significant part of code size.