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The Intel MCS-51 (commonly termed 8051) is a single-chip microcontroller (MCU) series developed by Intel in 1980 for use in embedded systems. The architect of the Intel MCS-51 instruction set was John H. Wharton. [1] [2] Intel's original versions were popular in the 1980s and early 1990s, and enhanced binary compatible derivatives remain ...
SAB-C515-LN by Infineon is based on the 8051. The Infineon XC800 family is an 8-bit microcontroller family, first introduced in 2005, [1] with a dual cycle optimized 8051 "E-Warp" [2] [3] core. The XC800 family is divided into two categories, the A-Family for Automotive and the I-Family for Industrial and multi-market applications.
An instruction set architecture (ISA) is an abstract model of a computer, also referred to as computer architecture.A realization of an ISA is called an implementation.An ISA permits multiple implementations that may vary in performance, physical size, and monetary cost (among other things); because the ISA serves as the interface between software and hardware.
MCS-51 8051 family – also incl. 8X31, 8X32, 8X52; X=0, 3, 7 or 9; MCS-151 High-performance 8051 instruction set/binary compatible family; 8/16-bit/32-bit. MCS-251 32-bit ALU with 1/8/16/32-bit CISC instruction set and 24-bit external address space (16-bit wide segmented). Fully binary compatible to the 8051 8-bit family. 16-bit
An orthogonal instruction set does not impose a limitation that requires a certain instruction to use a specific register [1] so there is little overlapping of instruction functionality. [2] Orthogonality was considered a major goal for processor designers in the 1970s, and the VAX-11 is often used as the benchmark for this concept.
Thumb-2 extends the limited 16-bit instruction set of Thumb with additional 32-bit instructions to give the instruction set more breadth, thus producing a variable-length instruction set. A stated aim for Thumb-2 was to achieve code density similar to Thumb with performance similar to the ARM instruction set on 32-bit memory.
Instruction set Host platform; Assembly Language for Multics (ALM) Yes MIT: GE-645 Honeywell 6180: GE-645 Honeywell 6180: 705 Autocoder: IBM: Free IBM 705: 1410/7010 OS Autocoder: IBM: Free IBM 1410 7010: IBM 1410 Processor Operating System (1410-PR-155) 7070/7074 Autocoder IBM: Free IBM 7070 IBM 7072 7074: 7080 Autocoder III IBM: Free IBM 7080 ...
Ultra-small-footprint microsequencer-based 8051 core 312 Artix-7 LUTs. Quad-core 8051 version is 1227 LUTs. MCL51 Core: TSK51/52: Altium: Royalty-free Wishbone / Intel 8051: 8-bit Intel 8051 instruction set compatible, lower clock cycle alternative Embedded Design on Altium Wiki: based on the MIPS instruction set architecture: BERI: University ...