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  2. DDR3 SDRAM - Wikipedia

    en.wikipedia.org/wiki/DDR3_SDRAM

    The DDR3L (DDR3 Low Voltage) standard is an addendum to the JESD79-3 DDR3 Memory Device Standard specifying low voltage devices. [31] The DDR3L standard is 1.35 V and has the label PC3L for its modules. Examples include DDR3L‐800 (PC3L-6400), DDR3L‐1066 (PC3L-8500), DDR3L‐1333 (PC3L-10600), and DDR3L‐1600 (PC3L-12800).

  3. Socket G2 - Wikipedia

    en.wikipedia.org/wiki/Socket_G2

    Supported memory: DDR3 SoDIMM (1066-1333 MHz, Sandy Bridge); DDR3\DDR3L 1600 may work without DDR3L power optimisations and with 1333 MHz clock speed. DDR3 SoDIMM (1066-1600 MHz, Sandy Bridge Core i7-2720QM and faster [ 5 ] ).

  4. DDR SDRAM - Wikipedia

    en.wikipedia.org/wiki/DDR_SDRAM

    None of its successors are forward or backward compatible with DDR1 SDRAM, meaning DDR2, DDR3, DDR4 and DDR5 memory modules will not work on DDR1-equipped motherboards, and vice versa. Compared to single data rate ( SDR ) SDRAM, the DDR SDRAM interface makes higher transfer rates possible through more strict control of the timing of the ...

  5. LGA 1151 - Wikipedia

    en.wikipedia.org/wiki/LGA_1151

    Intel officially states [8] [9] that Skylake's and Kaby Lake's integrated memory controllers (IMC) support DDR3L memory modules only rated at 1.35 V and DDR4 at 1.2 V, which led to the speculation that higher voltages of DDR3 modules could damage or destroy the IMC and processor. [10]

  6. Memory rank - Wikipedia

    en.wikipedia.org/wiki/Memory_rank

    The term rank was created and defined by JEDEC, the memory industry standards group. On a DDR, DDR2, or DDR3 memory module, each rank has a 64-bit-wide data bus (72 bits wide on DIMMs that support ECC). The number of physical DRAMs depends on their individual widths.

  7. JEDEC memory standards - Wikipedia

    en.wikipedia.org/wiki/JEDEC_memory_standards

    The JEDEC DDR3 SDRAM standard JESD-79-3f uses Mb and Gb to specify binary memory capacity: [7] "The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 512 Mb through 8 Gb for x4, x8, and x16 DDR3 SDRAM devices.

  8. Haswell (microarchitecture) - Wikipedia

    en.wikipedia.org/wiki/Haswell_(microarchitecture)

    Native support for dual-channel DDR3/DDR3L memory, [24] with up to 32 GB of RAM on LGA 1150 variants; 64 KB (32 KB Instruction + 32 KB Data) L1 cache and 256 KB L2 cache per core [25] A total of 16 PCI Express 3.0 lanes on LGA 1150 variants [26]

  9. DDR3L - Wikipedia

    en.wikipedia.org/?title=DDR3L&redirect=no

    DDR3 SDRAM#DDR3L and DDR3U extensions To a section : This is a redirect from a topic that does not have its own page to a section of a page on the subject. For redirects to embedded anchors on a page, use {{ R to anchor }} instead .