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  2. Program status word - Wikipedia

    en.wikipedia.org/wiki/Program_status_word

    Contained within the PSW are the two bit condition code, representing zero, positive, negative, overflow, and similar flags of other architectures' status registers. Conditional branch instructions test this encoded as a four bit value, with each bit representing a test of one of the four condition code values, 2 3 + 2 2 + 2 1 + 2 0. (Since IBM ...

  3. Status register - Wikipedia

    en.wikipedia.org/wiki/Status_register

    A status register, flag register, or condition code register (CCR) is a collection of status flag bits for a processor.Examples of such registers include FLAGS register in the x86 architecture, flags in the program status word (PSW) register in the IBM System/360 architecture through z/Architecture, and the application program status register (APSR) in the ARM Cortex-A architecture.

  4. Production part approval process - Wikipedia

    en.wikipedia.org/wiki/Production_part_approval...

    Level 2 – PSW with product samples and limited supporting data. Level 3PSW with product samples and complete supporting data. Level 4 – PSW and other requirements as defined by the customer. Level 5 – PSW with product samples and complete supporting data available for review at the supplier's manufacturing location. Complete ...

  5. Predication (computer architecture) - Wikipedia

    en.wikipedia.org/wiki/Predication_(computer...

    Conditional move instructions write the contents of one register over another only if the predicate's value is true, whereas conditional select instructions choose which of two registers has its contents written to a third based on the predicate's value. A more generalized and capable form is full predication. Full predication has a set of ...

  6. PSW - Wikipedia

    en.wikipedia.org/wiki/PSW

    PSW may refer to: PSW Science, the oldest scientific society in Washington, D.C. Personal Support Worker, Canada; PlayStation World, a UK magazine; Program status word, a control register in IBM mainframe computers; Baillie–PSW primality test in mathematics; Part Submission Warrant in production part approval process; Post Study Work Visa, UK

  7. Program-specific information - Wikipedia

    en.wikipedia.org/wiki/Program-specific_information

    Version number 5 Table version number. Incremented when data is changed and wrapped around on overflow for values greater than 32. Current/next indicator 1 Indicates if data is currently in effect or will be made effective in the near future. If the bit is 1, the data is to be used now. If 0, the decoder may begin to prepare for the data to change.

  8. IBM System/360 architecture - Wikipedia

    en.wikipedia.org/wiki/IBM_System/360_architecture

    There are two storage fields assigned to each class of interruption on the S/360; an old PSW double-word and a new PSW double-word. The processor stores the PSW, with an interruption code inserted, into the old PSW location and then loads the PSW from the new PSW location.

  9. PIC instruction listings - Wikipedia

    en.wikipedia.org/wiki/PIC_instruction_listings

    The instruction set does not contain conditional branch instructions. Instead, it contains conditional skip instructions which cause the following instruction to be ignored. A conditional skip followed by an unconditional branch performs a conditional branch. The skip instructions test any bit of any register.