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A serial port is a serial communication interface through which information transfers in or out sequentially one bit at a time. [1] This is in contrast to a parallel port , which communicates multiple bits simultaneously in parallel .
COM port (DE-9 connector). COM (communication port) [1] [2] is the original, yet still common, name of the serial port interface on PC-compatible computers. It can refer not only to physical ports, but also to emulated ports, such as ports created by Bluetooth or USB adapters.
Modern high speed serial interfaces such as PCIe [2] [3] [4] send data several bits at a time using modulation/encoding techniques such as PAM4 which groups 2 bits at a time into a single symbol, and several symbols are still sent one at the time. This replaces PAM2 or non return to zero (NRZ) which only sends one bit at a time, or in other ...
Later personal computers (and other devices) started to make use of the standard so that they could connect to existing equipment. For many years, an RS-232-compatible port was a standard feature for serial communications, such as modem connections, on many computers (with the computer acting as the DTE). It remained in widespread use into the ...
Serial Peripheral Interface (SPI) is a de facto standard (with many variants) for synchronous serial communication, used primarily in embedded systems for short-distance wired communication between integrated circuits.
RS-485, also known as TIA-485(-A) or EIA-485, is a standard, originally introduced in 1983, defining the electrical characteristics of drivers and receivers for use in serial communications systems. Electrical signaling is balanced , and multipoint systems are supported.
Asynchronous start-stop is the lower data-link layer used to connect computers to modems for many dial-up Internet access applications, using a second (encapsulating) data link framing protocol such as PPP to create packets made up out of asynchronous serial characters. The most common physical layer interface used is RS-232D.
Device interfaces where one bus transfers data via another will be limited to the throughput of the slowest interface, at best. For instance, SATA revision 3.0 (6 Gbit/s) controllers on one PCI Express 2.0 (5 Gbit/s) channel will be limited to the 5 Gbit/s rate and have to employ more channels to get around this problem.