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  2. TO-3 - Wikipedia

    en.wikipedia.org/wiki/TO-3

    In electronics, TO-3 is a designation for a standardized metal semiconductor package used for power semiconductors, including transistors, silicon controlled rectifiers, and, integrated circuits. TO stands for "Transistor Outline" and relates to a series of technical drawings produced by JEDEC .

  3. Via (electronics) - Wikipedia

    en.wikipedia.org/wiki/Via_(electronics)

    (3) Buried via. The gray and green layers are nonconducting, while the thin orange layers and red vias are conductive. A via (Latin, 'path' or 'way') is an electrical connection between two or more metal layers of a printed circuit boards (PCB) or integrated circuit. Essentially a via is a small drilled hole that goes through two or more ...

  4. List of electronic component packaging types - Wikipedia

    en.wikipedia.org/wiki/List_of_electronic...

    SOT: Small-outline transistor (also SOT-23, SOT-223, SOT-323). TO-XX: wide range of small pin count packages often used for discrete parts like transistors or diodes. TO-3: Panel-mount with leads; TO-5: Metal can package with radial leads; TO-18: Metal can package with radial leads; TO-39; TO-46; TO-66: Similar shape to the TO-3 but smaller

  5. Reference designator - Wikipedia

    en.wikipedia.org/wiki/Reference_designator

    A reference designator unambiguously identifies the location of a component within an electrical schematic or on a printed circuit board.The reference designator usually consists of one or two letters followed by a number, e.g. C3, D1, R4, U15.

  6. TO-66 - Wikipedia

    en.wikipedia.org/wiki/TO-66

    TO-66 is a type of semiconductor package for devices with three connections, such as transistors. The shape is similar to the TO-3 package, but the size is smaller. [ 1 ] The TO-66 package is made entirely of metal and is commonly used by silicon controlled rectifiers and power transistors . [ 2 ]

  7. Solid Logic Technology - Wikipedia

    en.wikipedia.org/wiki/Solid_Logic_Technology

    SLT used silicon planar glass-encapsulated transistors and diodes. [2] SLT uses dual diode chips and individual transistor chips each approximately 0.025 inches (0.64 mm) square. [3]: 15 The chips are mounted on a 0.5 inches (13 mm) square substrate with silk-screened resistors and printed connections. The whole is encapsulated to form a 0.5 ...

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