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2. MOSFET - Wikipedia

   en.wikipedia.org/wiki/MOSFET

   If the MOSFET is an n-channel or nMOS FET, then the source and drain are n+ regions and the body is a p region. If the MOSFET is a p-channel or pMOS FET, then the source and drain are p+ regions and the body is a n region. The source is so named because it is the source of the charge carriers (electrons for n-channel, holes for p-channel) that ...

3. H-bridge - Wikipedia

   en.wikipedia.org/wiki/H-bridge

   The most efficient MOSFET designs use N-channel MOSFETs on both the high side and low side because they typically have a third of the ON resistance of P-channel MOSFETs. This requires a more complex design since the gates of the high side MOSFETs must be driven positive with respect to the DC supply rail.

4. PMOS logic - Wikipedia

   en.wikipedia.org/wiki/PMOS_logic

   PMOS uses p-channel (+) metal-oxide-semiconductor field effect transistors (MOSFETs) to implement logic gates and other digital circuits. PMOS transistors operate by creating an inversion layer in an n-type transistor body. This inversion layer, called the p-channel, can conduct holes between p-type "source" and "drain" terminals.

5. Field-effect transistor - Wikipedia

   en.wikipedia.org/wiki/Field-effect_transistor

   I–V characteristics and output plot of a JFET n-channel transistor Simulation result for right side: formation of inversion channel (electron density) and left side: current-gate voltage curve (transfer characteristics) in an n-channel nanowire MOSFET. Note that the threshold voltage for this device lies around 0.45 V. FET conventional symbol ...

6. Open collector - Wikipedia

   en.wikipedia.org/wiki/Open_collector

   Open drain output uses MOS transistor (MOSFET) instead of BJTs, and expose the MOSFET's drain as output. [1]: 488ff An nMOS open drain output connects to ground when a high voltage is applied to the MOSFET's gate, or presents a high impedance when a low voltage is applied to the gate.

7. Depletion and enhancement modes - Wikipedia

   en.wikipedia.org/wiki/Depletion_and_enhancement...

   The mode can be determined by the sign of the threshold voltage (gate voltage relative to source voltage at the point where an inversion layer just forms in the channel): for an N-type FET, enhancement-mode devices have positive thresholds, and depletion-mode devices have negative thresholds; for a P-type FET, enhancement-mode have negative ...