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The HP Saturn processors, used in many Hewlett-Packard calculators between 1984 and 2003 (including the HP 48 series of scientific calculators) are "4-bit" (or hybrid 64-/4-bit) machines; as the Intel 4004 did, they string multiple 4-bit words together, e.g. to form a 20-bit memory address, and most of the registers are 64 bits wide, storing 16 ...
Internally, the Saturn CPU has four 4-bit data buses that allow for nearly 1-cycle per nibble performance with one or two buses acting as a source and one or two acting as a destination. [4] The smallest addressable word is a 4-bit nibble which can hold one binary-coded decimal (BCD) digit. Any unit of data in the registers larger than a nibble ...
The following is a list of CMOS 4000-series digital logic integrated circuits.In 1968, the original 4000-series was introduced by RCA.Although more recent parts are considerably faster, the 4000 devices operate over a wide power supply range (3V to 18V recommended range for "B" series) and are well suited to unregulated battery powered applications and interfacing with sensitive analogue ...
Since the source is only 4 bits then there are only 16 possible transmitted words. Included is the eight-bit value if an extra parity bit is used (see Hamming(7,4) code with an additional parity bit). (The data bits are shown in blue; the parity bits are shown in red; and the extra parity bit shown in green.)
4-bit microprocessors are relatively rare, and mostly used in electronic calculators where a 4-bit value holds one binary coded decimal digit. They should not be confused with bit slicing designs, where 4-bit ALUs were common - these are not microprocessors in their own right although they are intended to be used together to make one.
The application naturally suggested a 4-bit design, as this allowed direct manipulation of binary-coded decimal (BCD) values used by calculators. Hoff worked on the overall design concept through July and August 1969 but found that the Busicom executives seemed uninterested in his proposal.
The reason for adding 6 is that there are 16 possible 4-bit BCD values (since 2 4 = 16), but only 10 values are valid (0000 through 1001). For example: 1001 + 1000 = 10001 9 + 8 = 17 10001 is the binary, not decimal, representation of the desired result, but the most significant 1 (the "carry") cannot fit in a 4-bit binary number.
The very fastest shifters are implemented as full crossbars, in a manner similar to the 4-bit shifter depicted above, only larger. These incur the least delay, with the output always a single gate delay behind the input to be shifted (after allowing the small time needed for the shift count decoder to settle; this penalty, however, is only incurred when the shift count changes).