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ASML has orders for more than a dozen, though TSMC, its biggest customer for EUV equipment, has said it does not need to use High NA tools for its A16 chips, expected to enter production in 2025 ...
Extreme ultraviolet lithography (EUVL, also known simply as EUV) is a technology used in the semiconductor industry for manufacturing integrated circuits (ICs). It is a type of photolithography that uses 13.5 nm extreme ultraviolet (EUV) light from a laser-pulsed tin (Sn) plasma to create intricate patterns on semiconductor substrates.
ASML is working on the next generation of EUV systems, with the first shipments for R&D purposes shipped to Intel in December 2023, and TSMC in late 2024. [19] [20] The platform is designated High-NA as it increases the numerical aperture (NA) from 0.33 to 0.55, [17] and each system costs approximately $370 million. [2] [20]
Meteor Lake is built using four different fabrication nodes, including both Intel's own nodes and external nodes outsourced to fabrication competitor TSMC. The "Intel 4" process used for the CPU tile is the first process node in which Intel is utilising extreme ultraviolet (EUV) lithography, which is necessary for creating nodes 7nm and smaller ...
AMSTERDAM (Reuters) -Dutch semiconductor equipment maker ASML said on Thursday it is shipping the first of its new "High NA" extreme ultraviolet lithography systems to Intel Corp. ASML published ...
Lithography systems use focused light beams to help create the tiny circuitry of computer chips. ASML's High NA EUV tools, which are the size of a double decker bus and cost more than $350 million ...
At the 2016 EUVL Workshop, ASML reported that the 0.33 NA NXE EUV tools would not be capable of standard single exposure patterning for the 11-13 nm half-pitch expected at the 5 nm node. [98] A higher NA of 0.55 would allow single exposure EUV patterning of fields which are half the 26 mm x 33 mm standard field size. [ 98 ]
In October 2019, TSMC reportedly started sampling 5 nm A14 processors for Apple. [22] At the 2020 IEEE IEDM conference, TSMC reported their 5 nm process had 1.84x higher density than their 7nm process. [23] At IEDM 2019, TSMC revealed two versions of 5 nm, a DUV version with a 5.5-track cell, and an (official) EUV version with a 6-track cell.