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  2. 22 nm process - Wikipedia

    en.wikipedia.org/wiki/22_nm_process

    On September 22, 2009, during the Intel Developer Forum Fall 2009, Intel showed a 22 nm wafer and announced that chips with 22 nm technology would be available in the second half of 2011. [9] SRAM cell size is said to be 0.092 μm 2, smallest reported to date. On January 3, 2010, Intel and Micron Technology announced the first in a family of 25 ...

  3. List of semiconductor scale examples - Wikipedia

    en.wikipedia.org/wiki/List_of_semiconductor...

    TSMC began risk production of 256 Mbit SRAM memory chips using a 7 nm process in April 2017. [125] Samsung and TSMC began mass production of 7 nm devices in 2018. [126] Apple A12 and Huawei Kirin 980 mobile processors, both released in 2018, use 7 nm chips manufactured by TSMC. [127]

  4. Orders of magnitude (length) - Wikipedia

    en.wikipedia.org/wiki/Orders_of_magnitude_(length)

    3.8 nmsize of an albumin molecule; 5 nmsize of the gate length of a 16 nm processor; 5 nm – the average half-pitch of a memory cell manufactured circa 2019–2020; 6 nm – length of a phospholipid bilayer; 6–10 nm – thickness of cell membrane; 6.8 nm – width of a haemoglobin molecule; 7 nm – diameter of actin filaments

  5. Comparison of hub gears - Wikipedia

    en.wikipedia.org/wiki/Comparison_of_hub_gears

    60 Nm 1st gear 1650 g e-bike Shimano Nexus 4 Speed 4 184% 1st gear City Shimano Nexus Inter-3: 3 187% 2nd gear 1220 g City SRAM Spectro E12 (Elan) 1995 1999 12 339% 3500-4000 g City SRAM i-Motion 9: 2005 2012 9 340% 2000g (w/o brake)-2400g (with coaster brake) City SRAM G8: 2012 2015 8 260% 2088-2180 g [16] [17] City SRAM G9 2014 2015 9 292%

  6. 3 nm process - Wikipedia

    en.wikipedia.org/wiki/3_nm_process

    In December 2022, at IEDM 2022 conference, TSMC disclosed a few details about their 3 nm process technologies: contacted gate pitch of N3 is 45 nm, minimum metal pitch of N3E is 23 nm, and SRAM cell area is 0.0199 μm 2 for N3 and 0.021 μm 2 for N3E (same as in N5). For N3E process, depending on the number of fins in cells used for design ...

  7. 2 nm process - Wikipedia

    en.wikipedia.org/wiki/2_nm_process

    In semiconductor manufacturing, the 2 nm process is the next MOSFET (metal–oxide–semiconductor field-effect transistor) die shrink after the 3 nm process node.. The term "2 nanometer", or alternatively "20 angstrom" (a term used by Intel), has no relation to any actual physical feature (such as gate length, metal pitch or gate pitch) of the transistors.

  8. Comparison of Intel processors - Wikipedia

    en.wikipedia.org/wiki/Comparison_of_Intel_processors

    Intel 7, 14 nm, 22 nm, 32 nm, 45 nm, 65 nm 2.9 W – 73 W 1 or 2, 2 /w hyperthreading 800 MHz, 1066 MHz, 2.5GT/s, 5 GT/s 64 KiB per core 2x256 KiB – 2 MiB 0 KiB – 3 MiB Intel Core: Txxxx Lxxxx Uxxxx Yonah: 2006–2008 1.06 GHz – 2.33 GHz Socket M: 65 nm 5.5 W – 49 W 1 or 2 533 MHz, 667 MHz 64 KiB per core 2 MiB N/A Intel Core 2: Uxxxx

  9. ASML Holding - Wikipedia

    en.wikipedia.org/wiki/ASML_Holding

    ASML Holding N.V. (commonly shortened to ASML, originally standing for Advanced Semiconductor Materials Lithography) is a Dutch multinational corporation founded in 1984. . ASML specializes in the development and manufacturing of photolithography machines which are used to produce computer c

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