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  2. List of AMD Ryzen processors - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_Ryzen_processors

    CPU uses Zen4 cores (Phoenix) or a combination of Zen4 and Zen4c cores (Phoenix2). GPU uses the RDNA 3 (Navi 3) architecture. Some models include first generation Ryzen AI NPU (XDNA). All models support AVX-512 using a half-width 256-bit FPU. PCIe 4.0 support. Native USB 4 (40Gbps) Ports: 2; Native USB 3.2 Gen 2 (10Gbps) Ports: 2

  3. Table of AMD processors - Wikipedia

    en.wikipedia.org/wiki/Table_of_AMD_processors

    Ryzen Threadripper (2920X, 2950X, 2970WX, 2990WX) 12/16/24/32 Yes 3000–3500 (4200–4400 boost) 32–64 MB Socket TR4: Quad-channel DDR4: January 2019: Picasso Ryzen 3 (3300U, Pro 3300U, 3350U) 4 No 2100 (3500 boost) 4 MB Socket FP5: Dual-channel DDR4: Ryzen 5 (3450U, 3500C, 3500U, Pro 3500U, 3550H, 3580U), Ryzen 7 (3700C, 3700U, Pro 3700U ...

  4. List of AMD processors - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_processors

    This article gives a list of AMD microprocessors, sorted by generation and release year.If applicable and openly known, the designation(s) of each processor's core (versions) is (are) listed in parentheses.

  5. Ryzen - Wikipedia

    en.wikipedia.org/wiki/Ryzen

    The third generation of Ryzen processors launched on July 7, 2019, based on AMD's Zen 2 architecture, featuring significant design improvements with a +15 percent average IPC boost, a doubling of floating point capability to a full 256-bit-wide execution data path much like Intel's Haswell released in 2014, [20] a shift to an multi-chip module ...

  6. List of AMD CPU microarchitectures - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_CPU_micro...

    The third generation, branded as XP, introduced full support for SSE. AMD K8 Hammer – also known as AMD Family 0Fh . Based on the K7 but was designed around a 64-bit ISA , added an integrated memory controller , HyperTransport communication fabric, L2 cache sizes up to 1 MB (1128 KB total cache), and SSE2 .

  7. Epyc - Wikipedia

    en.wikipedia.org/wiki/Epyc

    Second and Third gen Epyc CPUs are composed of eight compute dies built on a 7 nm process node, and a large input/output (I/O) die built on a 14 nm process node. [24] Third gen Milan-X CPUs use advanced through-silicon-vias to stack an additional die on top of each of the 8 compute dies, adding 64 MB of L3 cache per die. [25]

  8. Zen 2 - Wikipedia

    en.wikipedia.org/wiki/Zen_2

    Zen 2 is a computer processor microarchitecture by AMD.It is the successor of AMD's Zen and Zen+ microarchitectures, and is fabricated on the 7 nm MOSFET node from TSMC.The microarchitecture powers the third generation of Ryzen processors, known as Ryzen 3000 for the mainstream desktop chips (codename "Matisse"), Ryzen 4000U/H (codename "Renoir") and Ryzen 5000U (codename "Lucienne") for ...

  9. List of AMD mobile processors - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_mobile_processors

    Mobile processor Processors – Socket S1 Turion 64 X2 dual-core 64-bit Hawk family processor 65 nm (codenamed Tyler), or; Mobile Sempron single-core 64-bit processor 65 nm (codenamed Sherman) Mobile chipset HDMI, HyperTransport 1.0 and PCI Express 1.0; DDR2-800 SO-DIMM; Mobile support Wireless IEEE 802.11 a/b/g/draft-N support, mini-PCIe Wi-Fi ...

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