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Intel Haswell Core i7-4771 CPU, sitting atop its original packaging that contains an OEM fan-cooled heatsink. This generational list of Intel processors attempts to present all of Intel's processors from the 4-bit 4004 (1971) to the present high-end offerings. Concise technical data is given for each product.
The latest badge promoting the Intel Core branding. The following is a list of Intel Core processors.This includes Intel's original Core (Solo/Duo) mobile series based on the Enhanced Pentium M microarchitecture, as well as its Core 2- (Solo/Duo/Quad/Extreme), Core i3-, Core i5-, Core i7-, Core i9-, Core M- (m3/m5/m7/m9), Core 3-, Core 5-, and Core 7- Core 9-, branded processors.
Processor Series nomenclature Code name Production date Features supported (instruction set)Clock rate Socket Fabri-cation TDP Cores (number) Bus speed Cache L1 Cache L2 Cache L3 Overclock
The Core series is also the first Intel processor used in an Apple Macintosh computer. The Core Duo was the CPU for the first generation MacBook Pro, while the Core Solo appeared in Apple's Mac Mini line. Core Duo signified the beginning of Apple's shift to Intel processors across the entire Mac line.
The processors are connected to PCHs using an OPIO 2.0 x8 interface, except for the HX series which uses a DMI 4.0 x8 interface. [29] Except for the HX series, the processor and PCH are packaged together on a multi-chip package. The HX series uses 45x37.5mm BGA 1964, and the other mobile processors use 25x50mm BGA 1744, on a Type 3 or Type 4 HDI.
Intel Communication Streaming Architecture; Template:Intel Data Center GPU Max series; Intel Display Power Saving Technology; Intel Edison; Intel Evo; Intel Galileo; Intel Modular Server System; Intel Paragon; Intel PRO/Wireless; Template:Intel processors; Intel Reader; Intel system development kit; Intel T5300; Intel Threat Detection ...
4.1 Xeon 3000 series. 4.2 Xeon 5000 series. ... List of Intel Xeon processors. ... The following is a list of Intel Xeon microprocessors, ...
Based on Penryn microarchitecture; Chip harvests from Yorkfield with half L2 cache disabled; All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, Enhanced Intel SpeedStep Technology (EIST), Enhanced Halt State (C1E), Intel 64, XD bit (an NX bit implementation), Intel VT-x