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x86 (also known as 80x86 [3] or the 8086 family [4]) is a family of complex instruction set computer (CISC) instruction set architectures [a] initially developed by Intel, based on the 8086 microprocessor and its 8-bit-external-bus variant, the 8088.
The x86 instruction set refers to the set of instructions that x86-compatible microprocessors support. The instructions are usually part of an executable program, often stored as a computer file and executed on the processor. The x86 instruction set has been extended several times, introducing wider registers and datatypes as well as new ...
x86-64 (also known as x64, x86_64, AMD64, and Intel 64) [note 1] is a 64-bit extension of the x86 instruction set architecture first announced in 1999. It introduces two new operating modes: 64-bit mode and compatibility mode, along with a new four-level paging mechanism.
Intel's second generation of 32-bit x86 processors, introduced built-in floating point unit (FPU), 8 KB on-chip L1 cache, and pipelining. Faster per MHz than the 386. Small number of new instructions. P5 original Pentium microprocessors, first x86 processor with super-scalar architecture and branch prediction. P6
Auctor Maple SoC. DM&P Electronics (continues SiS' Vortex86 line) ZF Micro ZFx86, [4] Cx486DX SoC RDC Semiconductors [5] 486SX compatible RISC core (R8610 and R8620); DP Kwazar SP (ДП КВАЗАР-ІС) [6] - As of December 2021, КР1810ВМ86 (Soviet 8086 clone) still appears on Kwazar's price list.
x86 assembly language is a family of low-level programming languages that are used to produce object code for the x86 class of processors. These languages provide backward compatibility with CPUs dating back to the Intel 8008 microprocessor, introduced in April 1972.
The x86 instruction set has several times been extended with SIMD (Single instruction, multiple data) instruction set extensions.These extensions, starting from the MMX instruction set extension introduced with Pentium MMX in 1997, typically define sets of wide registers and instructions that subdivide these registers into fixed-size lanes and perform a computation for each lane in parallel.
This article describes the calling conventions used when programming x86 architecture microprocessors. Calling conventions describe the interface of called code: The order in which atomic (scalar) parameters, or individual parts of a complex parameter, are allocated; How parameters are passed (pushed on the stack, placed in registers, or a mix ...