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In cryptography, a timing attack is a side-channel attack in which the attacker attempts to compromise a cryptosystem by analyzing the time taken to execute cryptographic algorithms. Every logical operation in a computer takes time to execute, and the time can differ based on the input; with precise measurements of the time for each operation ...
His side-channel attack countermeasure designs are widely deployed in secure integrated circuits and other cryptographic devices. [3] He has also worked on microprocessor security, and co-discovered and named the spectre vulnerability , which leverages speculative execution and other microprocessor performance optimizations to extract ...
Exploiting a TOCTOU race condition requires precise timing to ensure that the attacker's operations interleave properly with the victim's. In the example above, the attacker must execute the symlink system call precisely between the access and open. For the most general attack, the attacker must be scheduled for execution after each operation ...
Cache timing attacks also known as Cache attacks are a type of side-channel attack that allows attackers to gain information about a system purely by tracking cache access made by the victim system in a shared environment.
A Lucky Thirteen attack is a cryptographic timing attack against implementations of the Transport Layer Security (TLS) protocol that use the CBC mode of operation, first reported in February 2013 by its developers Nadhem J. AlFardan and Kenny Paterson of the Information Security Group at Royal Holloway, University of London. [1] [2]
Traffic analysis method can be used to break the anonymity of anonymous networks, e.g., TORs. [1] There are two methods of traffic-analysis attack, passive and active. In passive traffic-analysis method, the attacker extracts features from the traffic of a specific flow on one side of the network and looks for those features on the other side of the network.
In 2002 and 2003, Yukiyasu Tsunoo and colleagues from NEC showed how to attack MISTY and DES symmetric key ciphers, respectively. In 2005, Daniel Bernstein from the University of Illinois, Chicago reported an extraction of an OpenSSL AES key via a cache timing attack, and Colin Percival had a working attack on the OpenSSL RSA key using the Intel processor's cache.
This section was confusing. While the example applied to OpenSSL, the attack was general to SSL/TLS using block ciphers in CBC mode (which itself might be a good example). I think the article requires more background to timing attacks, and then include more detailed examples if needed. Mmernex 15:17, 16 March 2009 (UTC)