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The first Verilog simulator available on the Windows OS. The simulator had a cycle-based counterpart called 'CycleDrive'. FrontLine was sold to Avant! in 1998, which was later acquired by Synopsys in 2002. Synopsys discontinued Purespeed in favor of its well-established VCS simulator. Quartus II Simulator (Qsim) Altera: VHDL-1993, V2001, SV2005
TINA software is available in installable and cloud-based versions. Feature versions exist for use in industry [6] and for educational use. [2] [7] TINA allows simulation, design, and real-time testing of hardware description language (HDL), such as VHDL, VHDL-AMS, Verilog, Verilog-A, Verilog-AMS, SystemVerilog and SystemC and for microcontroller (MCU) circuits, [2] as well as mixed electronic ...
Unified linker / elaborator for Verilog, VHDL, and SystemC libraries. Generates a simulation object file referred to as a snapshot image. NC Sim ncsim Unified simulation engine for Verilog, VHDL, and SystemC. Loads snapshot images generated by NC Elaborator. This tool can be run in GUI mode or batch command-line mode.
VHDL analyzer, compiler, and simulator. [12] Icarus Verilog *BSD, Linux, Mac: GPL-2.0-or-later: Verilog simulator Verilator: Posix: LGPL-3.0-only or Artistic-2.0: Verilator is the fastest free Verilog HDL simulator. It compiles synthesizable Verilog into cycle accurate C++ or SystemC code following 2-state
ModelSim PE - Nanometer IC Design: digital design and simulation; Windows-based simulator for VHDL, Verilog, or mixed-language simulation environments; ModelSim SE - Nanometer IC Design: digital design and simulation; tri-lingual simulator with VHDL, Verilog, and SystemC; Nimbic products [3] Nucleus EDGE - embedded systems development tools
Quite Universal Circuit Simulator (Qucs) is a free-software electronics circuit simulator software application released under GPL. It offers the ability to set up a circuit with a graphical user interface and simulate the large-signal, small-signal and noise behaviour of the circuit. Pure digital simulations are also supported using VHDL and/or ...
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Icarus Verilog is an implementation of the Verilog hardware description language compiler that generates netlists in the desired format and a simulator. It supports the 1995, 2001 and 2005 versions of the standard, portions of SystemVerilog , and some extensions.