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For an NPN open emitter output, the collector is connected to the positive voltage rail, so the emitter outputs a high voltage when the transistor is on and is hi-Z when off. For a PNP open emitter output, the collector is connected to the low voltage supply, so the emitter outputs a low voltage when the transistor is on and is hi-Z when off.
See also: Diode logic § Active-high AND logic gate Open-collector buffers connected as wired AND.. The wired AND connection is a form of AND gate.When using open collector or similar outputs (which can be identified by the ⎐ symbol in schematics), wired AND only requires a pull up resistor on the shared output wire.
A common variation omits the collector resistor of the output transistor, making an open-collector output. This allows the designer to fabricate wired logic by connecting the open-collector outputs of several logic gates together and providing a single external pull-up resistor. If any of the logic gates becomes logic low (transistor conducting ...
open-collector 30 V / 40 mA 14 SN74LS06: 74x07 6 hex buffer gate: open-collector 30 V / 40 mA 14 SN74LS07: 74x08 4 quad 2-input AND gate: 14 SN74LS08: 74x09 4 quad 2-input AND gate open-collector 14 SN74LS09: 74x10 3 triple 3-input NAND gate 14 SN74LS10: 74x11 3 triple 3-input AND gate 14 SN74LS11: 74x12 3 triple 3-input NAND gate open ...
The output of an inverter is at the collector. Likewise, it is either a current sink (low logic level) or a high-z floating condition (high logic level). Like direct-coupled transistor logic, there is no resistor between the output (collector) of one NPN transistor and the input (base) of the following transistor.
The open collector input/output is a popular alternative to three-state logic. For example, the I²C bus protocol (a bi-directional communication bus protocol often used between devices) specifies the use of pull-up resistors on the two communication lines.
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The output of a common emitter amplifier is inverted; i.e. for a sine wave input signal, the output signal is 180 degrees out of phase with respect to the input. [ 1 ] In this circuit, the base terminal of the transistor serves as the input, the collector is the output, and the emitter is common to both (for example, it may be tied to ground ...