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  2. Socket AM4 - Wikipedia

    en.wikipedia.org/wiki/Socket_AM4

    It has 1331 pin slots and is the first from AMD to support DDR4 memory as well as achieve unified compatibility between high-end CPUs (previously using Socket AM3+) and AMD's lower-end APUs (on various other sockets). [3] [4] In 2017, AMD made a commitment to using the AM4 platform with socket 1331 until 2020.

  3. List of AMD Ryzen processors - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_Ryzen_processors

    Common features of Ryzen 5000 (Cezanne) desktop CPUs: Socket: AM4. CPUs support DDR4-3200 in dual-channel mode. L1 cache: 64 KB (32 KB data + 32 KB instruction) per core. L2 cache: 512 KB per core. CPUs support 24 PCIe 3.0 lanes. 4 of the lanes are reserved as link to the chipset. No integrated graphics. Fabrication process: TSMC 7FF.

  4. List of AMD processors with 3D graphics - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_Processors...

    Dual-channel DDR4 memory controller; Common features of Ryzen 5000 desktop APUs: Socket: AM4. All the CPUs support DDR4-3200 in dual-channel mode. L1 cache: 64 KB (32 KB data + 32 KB instruction) per core. L2 cache: 512 KB per core. All the CPUs support 24 PCIe 3.0 lanes. 4 of the lanes are reserved as link to the chipset.

  5. Zen 3 - Wikipedia

    en.wikipedia.org/wiki/Zen_3

    Zen 3 is the last microarchitecture before AMD switched to DDR5 memory and new sockets, which are AM5 for the desktop "Ryzen" chips alongside SP5 and SP6 for the EPYC server platform and sTRX8. [3] According to AMD, Zen 3 has a 19% higher instructions per cycle (IPC) on average than Zen 2 .

  6. Table of AMD processors - Wikipedia

    en.wikipedia.org/wiki/Table_of_AMD_processors

    Ryzen 7040 6/8 3800–4300 (5000–5200) 16 MB Socket FP7, FP7r2, FP8 Dual-channel DDR5 or LPDDR5X: ... Memory Controller SIMD Speed/Power Other Changes

  7. Template:AMD Ryzen 5000 Series - Wikipedia

    en.wikipedia.org/wiki/Template:AMD_Ryzen_5000_Series

    Common features of Ryzen 5000 desktop CPUs: Socket: AM4. All the CPUs support DDR4-3200 in dual-channel mode. All the CPUs support 24 PCIe 4.0 lanes. 4 of the lanes are reserved as link to the chipset. No integrated graphics. L1 cache: 64 KB per core (32 KB data + 32 KB instruction). L2 cache: 512 KB per core. Fabrication process: TSMC 7FF.

  8. Socket TR4 - Wikipedia

    en.wikipedia.org/wiki/Socket_TR4

    Socket TR4, also known as Socket SP3r2, is a zero insertion force land grid array (LGA) CPU socket designed by AMD supporting its first- and second-generation Zen-based Ryzen Threadripper desktop processors, [1] [2] launched on August 10, 2017 [3] for the high-end desktop and workstation platforms.

  9. CPU socket - Wikipedia

    en.wikipedia.org/wiki/CPU_socket

    AMD Ryzen 1000 series AMD Ryzen 2000 series AMD Ryzen 3000 series AMD Ryzen 4000 series AMD Ryzen 5000 series. Desktop PGA: 1331 1 Depends on DDR4 speed compatible with AMD Ryzen 9, Ryzen 7, Ryzen 5 & Ryzen 3 Zen based processors Socket SP3: 2017 AMD Epyc Naples AMD Epyc Rome AMD Epyc Milan: Server LGA: 4094 ? Depends on DDR4 speed compatible ...

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