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  2. Serial Peripheral Interface - Wikipedia

    en.wikipedia.org/wiki/Serial_Peripheral_Interface

    A Queued Serial Peripheral Interface (QSPI; different to but has same abbreviation as Quad SPI described in § Quad SPI) is a type of SPI controller that uses a data queue to transfer data across an SPI bus. [19] It has a wrap-around mode allowing continuous transfers to and from the queue with only intermittent attention from the CPU.

  3. Intel QuickPath Interconnect - Wikipedia

    en.wikipedia.org/wiki/Intel_QuickPath_Interconnect

    Thus, Intel describes a 20-lane QPI link pair (send and receive) with a 3.2 GHz clock as having a data rate of 25.6 GB/s. A clock rate of 2.4 GHz yields a data rate of 19.2 GB/s. More generally, by this definition a two-link 20-lane QPI transfers eight bytes per clock cycle, four in each direction. The rate is computed as follows: 3.2 GHz

  4. PDF24 Creator - Wikipedia

    en.wikipedia.org/wiki/PDF24_Creator

    The commands sent are then used to create a PDF file. PDF24 Creator uses PDFBox , QPDF and Ghostscript , which are automatically installed as a private instances for the PDF24 Creator. After printing a document on the PDF printer, a wizard opens automatically, where the created PDF file can be edited or further worked on.

  5. System Packet Interface - Wikipedia

    en.wikipedia.org/wiki/System_Packet_Interface

    Devices implementing SPI are typically specified with line rates of 700~800 Mbit/s and in some cases up to 1 Gbit/s. The latest version is SPI 4 Phase 2 also known as SPI 4.2 delivers bandwidth of up to 16 Gbit/s for a 16 bit interface. The Interlaken protocol, a close variant of SPI-5 replaced the System Packet Interface in the marketplace.

  6. Uncore - Wikipedia

    en.wikipedia.org/wiki/Uncore

    In contrast, Uncore functions include QPI controllers, L3 cache, snoop agent pipeline, on-die memory controller, on-die PCI Express Root Complex, and Thunderbolt controller. [3] Other bus controllers such as SPI and LPC are part of the chipset. [4] The Intel uncore design stems from its origin as the northbridge. The design of the Intel uncore ...

  7. NXP LPC - Wikipedia

    en.wikipedia.org/wiki/NXP_LPC

    OpenOCD, an open source software package for JTAG access using a wide variety of hardware adapters. LPC-Link 2, by NXP, a JTAG / SWD debug adapter that has multiple firmware releases available to emulate popular debug adapter protocols, such as: J-Link by Segger, CMSIS-DAP by ARM, Redlink by Code Red Technologies.

  8. LTspice - Wikipedia

    en.wikipedia.org/wiki/LTspice

    LTspice is a SPICE-based analog electronic circuit simulator computer software, produced by semiconductor manufacturer Analog Devices (originally by Linear Technology). [2] It is the most widely distributed and used SPICE software in the industry. [6]

  9. BeagleBoard - Wikipedia

    en.wikipedia.org/wiki/Beagleboard

    The BeagleBoard is a low-power open-source single-board computer produced by Texas Instruments in association with Digi-Key and Newark element14.The BeagleBoard was also designed with open source software development in mind, and as a way of demonstrating the Texas Instrument's OMAP3530 system-on-a-chip. [8]

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