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Segment descriptor. In memory addressing for Intel x86 computer architectures, segment descriptors are a part of the segmentation unit, used for translating a logical address to a linear address. Segment descriptors describe the memory segment referred to in the logical address. [1] The segment descriptor (8 bytes long in 80286 and later ...
Otherwise, address translation continues. The processor then takes the 32-bit or 16-bit offset and compares it against the segment limit specified in the segment descriptor. If it is larger, a GP fault is generated. Otherwise, the processor adds the 24-bit segment base, specified in descriptor, to the offset, creating a linear physical address.
The GDT is a table of 8-byte entries. Each entry may refer to a segment descriptor, Task State Segment (TSS), Local Descriptor Table (LDT), or call gate. Call gates were designed for transferring control between x86 privilege levels, although this mechanism is not used on most modern operating systems. There is also a Local Descriptor Table (LDT).
Load access rights byte from the specified segment descriptor. Reads bytes 4-7 of segment descriptor, bitwise-ANDs it with 0x00FxFF00, [h] then stores the bottom 16/32 bits of the result in destination register. Sets EFLAGS.ZF=1 if the descriptor could be loaded, ZF=0 otherwise. #UD LSL r,r/m16: 0F 03 /r: Load segment limit from the specified ...
Memory segmentation is an operating system memory management technique of dividing a computer 's primary memory into segments or sections. In a computer system using segmentation, a reference to a memory location includes a value that identifies a segment and an offset (memory location) within that segment. Segments or sections are also used in ...
There are two such tables, the Global Descriptor Table (GDT) and the Local Descriptor Table (LDT), each holding up to 8192 segment descriptors, each segment giving access to 64 KB of memory. In the 80286, a segment descriptor provides a 24-bit base address, and this base address is added to a 16-bit offset to create an absolute address. The ...
Task state segment. The task state segment (TSS) is a structure on x86 -based computers which holds information about a task. It is used by the operating system kernel for task management. Specifically, the following information is stored in the TSS: Processor register state. I/O port permissions.
e. In x86 computing, unreal mode, also big real mode, flat real mode, or voodoo mode[1] is a variant of real mode, in which one or more segment descriptors has been loaded with non-standard values, like 32-bit limits allowing access to the entire memory. Contrary to its name, it is not a separate addressing mode that the x86 processors can ...