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  2. Jaguar (microarchitecture) - Wikipedia

    en.wikipedia.org/wiki/Jaguar_(microarchitecture)

    The AMD Jaguar Family 16h is a low-power microarchitecture designed by AMD. It is used in APUs succeeding the Bobcat Family microarchitecture in 2013 and being succeeded by AMD's Puma architecture in 2014. It is two-way superscalar and capable of out-of-order execution.

  3. List of AMD CPU microarchitectures - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_CPU_micro...

    AMD Family 10h (K10) – based on the K8 microarchitecture. Shared Level 3 Cache, 128-bit floating point units, AMD-V Nested Paging virtualization, and HyperTransport 3.0 are introduced. Barcelona was the first design which implemented it. AMD Family 11h – combined elements of K8 and K10 designs for Turion X2 Ultra / Puma mobile platform.

  4. Puma (microarchitecture) - Wikipedia

    en.wikipedia.org/wiki/Puma_(microarchitecture)

    The Puma Family 16h is a low-power microarchitecture by AMD for its APUs.It succeeds the Jaguar as a second-generation version, targets the same market, and belongs to the same AMD architecture Family 16h.

  5. Category:AMD microarchitectures - Wikipedia

    en.wikipedia.org/wiki/Category:AMD_micro...

    This page was last edited on 25 December 2022, at 06:42 (UTC).; Text is available under the Creative Commons Attribution-ShareAlike 4.0 License; additional terms may apply.

  6. Comparison of CPU microarchitectures - Wikipedia

    en.wikipedia.org/wiki/Comparison_of_CPU_micro...

    Microarchitecture Year Pipeline stages Misc Elbrus-8S: 2014 VLIW, Elbrus (proprietary, closed) version 5, 64-bit AMD K5: 1996 5 Superscalar, branch prediction, speculative execution, out-of-order execution, register renaming [a] AMD K6: 1997 6 Superscalar, branch prediction, speculative execution, out-of-order execution, register renaming [b ...

  7. Bobcat (microarchitecture) - Wikipedia

    en.wikipedia.org/wiki/Bobcat_(microarchitecture)

    The AMD Bobcat Family 14h is a microarchitecture created by AMD for its AMD APUs, aimed at a low-power/low-cost market. [ 1 ] It was revealed during a speech from AMD executive vice-president Henri Richard in Computex 2007 and was put into production Q1 2011. [ 2 ]

  8. List of AMD processors with 3D graphics - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_Processors...

    4 CPU Cores (Jaguar & Puma microarchitecture) L1 Cache: 32 KB Data per core and 32 KB Instructions per core; MMX, SSE, SSE2, SSE3, SSSE3, SSE4a, SSE4.1, SSE4.2, AVX, F16C, CLMUL, AES, MOVBE (Move Big-Endian instruction), XSAVE/XSAVEOPT, ABM, BMI1, AMD-V support; Single-channel DDR3 memory controller; Turbo Dock Technology, C6 and CC6 low power ...

  9. AMD 10h - Wikipedia

    en.wikipedia.org/wiki/AMD_10h

    The AMD Family 10h, or K10, is a microprocessor microarchitecture by AMD based on the K8 microarchitecture. [1] The first third-generation Opteron products for servers were launched on September 10, 2007, with the Phenom processors for desktops following and launching on November 11, 2007 as the immediate successors to the K8 series of processors (Athlon 64, Opteron, 64-bit Sempron).