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Patterson co-authored seven books, including two with John L. Hennessy on computer architecture: Computer Architecture: A Quantitative Approach (6 editions—latest is ISBN 978-0128119051) and Computer Organization and Design RISC-V Edition: the Hardware/Software Interface (5 editions—latest is ISBN 978-0128122761).
Hennessy has a history of strong interest and involvement in college-level computer education. He co-authored, with David Patterson, two well-known books on computer architecture, Computer Organization and Design: the Hardware/Software Interface and Computer Architecture: A Quantitative Approach, [5] which introduced the DLX RISC
The first documented computer architecture was in the correspondence between Charles Babbage and Ada Lovelace, describing the analytical engine.While building the computer Z1 in 1936, Konrad Zuse described in two patent applications for his future projects that machine instructions could be stored in the same storage used for data, i.e., the stored-program concept.
The DLX (pronounced "Deluxe") is a RISC processor architecture designed by John L. Hennessy and David A. Patterson, the principal designers of the Stanford MIPS and the Berkeley RISC designs (respectively), the two benchmark examples of RISC design (named after the Berkeley design).
Co-author of the chapter on interconnection networks in the fourth edition of the book "Computer Architecture: A Quantitative Approach" by John Hennessy and Dave Patterson. This is the most widely used and cited book on computer architecture available today (more than 8000 citations in total [6]).
A domain-specific architecture (DSA) is a programmable computer architecture specifically tailored to operate very efficiently within the confines of a given application domain. The term is often used in contrast to general-purpose architectures, such as CPUs , that are designed to operate on any computer program .
A complex instruction set computer (CISC / ˈ s ɪ s k /) is a computer architecture in which single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or are capable of multi-step operations or addressing modes within single instructions.
The term "latency" is used in computer science often and means the time from when an operation starts until it completes. Thus, instruction fetch has a latency of one clock cycle (if using single-cycle SRAM or if the instruction was in the cache). Thus, during the Instruction Fetch stage, a 32-bit instruction is fetched from the instruction memory.