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The Intel MCS-51 (commonly termed 8051) is a single-chip microcontroller (MCU) series developed by Intel in 1980 for use in embedded systems. The architect of the Intel MCS-51 instruction set was John H. Wharton. [1] [2] Intel's original versions were popular in the 1980s and early 1990s, and enhanced binary compatible derivatives remain ...
It is primarily used to support binary-coded decimal (BCD) arithmetic. The Auxiliary Carry flag is set (to 1) if during an " add " operation there is a carry from the low nibble (lowest four bits) to the high nibble (upper four bits), or a borrow from the high nibble to the low nibble, in the low-order 8-bit portion, during a subtraction.
Instructions which write to the entire flags register: POPF, IRET, interrupts, or any other instruction which causes a hardware task switch. The parity flag is tested by conditional jump instructions; the JP instruction jumps to the given target when the parity flag is set and the JNP instruction jumps if it is not set.
In computer processors, the carry flag (usually indicated as the C flag) is a single bit in a system status register/flag register used to indicate when an arithmetic carry or borrow has been generated out of the most significant arithmetic logic unit (ALU) bit position.
The 8051 microcontroller has two, a primary accumulator and a secondary accumulator, where the second is used by instructions only when multiplying (MUL AB) or dividing (DIV AB); the former splits the 16-bit result between the two 8-bit accumulators, whereas the latter stores the quotient on the primary accumulator A and the remainder in the ...
An instruction set architecture (ISA) is an abstract model of a computer, also referred to as computer architecture.A realization of an ISA is called an implementation.An ISA permits multiple implementations that may vary in performance, physical size, and monetary cost (among other things); because the ISA serves as the interface between software and hardware.
Also, different status registers are mapped into the SFR, for use in checking the status of the 8051, and changing some operational parameters of the 8051. Some SFR bits may be set directly using SETB/LDB instructions on the SFR's address, whereas others may require usage of specific instructions.
A status register, flag register, or condition code register (CCR) is a collection of status flag bits for a processor.Examples of such registers include FLAGS register in the x86 architecture, flags in the program status word (PSW) register in the IBM System/360 architecture through z/Architecture, and the application program status register (APSR) in the ARM Cortex-A architecture.