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  2. Extensible Host Controller Interface - Wikipedia

    en.wikipedia.org/wiki/Extensible_Host_Controller...

    For example, a USB 2 PCIe host controller card that presents 4 USB "Standard A" connectors typically presents one 4-port EHCI and two 2-port OHCI controllers to system software. When a high-speed USB device is attached to any of the 4 connectors, the device is managed through one of the 4 root hub ports of the EHCI controller.

  3. Host controller interface (USB, Firewire) - Wikipedia

    en.wikipedia.org/wiki/Host_controller_interface...

    Universal Host Controller Interface (UHCI) is a proprietary interface created by Intel for USB 1.x (full and low speeds). It requires a license from Intel. A USB controller using UHCI does little in hardware and requires a software UHCI driver to do much of the work of managing the USB bus. [2] It only supports 32-bit memory addressing, [4] so ...

  4. USB communications - Wikipedia

    en.wikipedia.org/wiki/USB_communications

    It is intended primarily to save cost in low-bandwidth human interface devices (HID) such as keyboards, mice, and joysticks. Full speed (FS) rate of 12 Mbit/s is the basic USB signaling rate defined by USB 1.0. All USB hubs can operate at this rate. High speed (HS) rate of 480 Mbit/s was introduced in 2001 by USB 2.0.

  5. USB On-The-Go - Wikipedia

    en.wikipedia.org/wiki/USB_On-The-Go

    USB high speed host controller based on EHCI (a register interface) Full/low speed host controller based on OHCI (another register interface) USB device controller, supporting both high and full speeds; Fourth controller to switch the OTG root port between host and device controllers; Also, most gadgets must be either a host or a device.

  6. USB - Wikipedia

    en.wikipedia.org/wiki/USB

    The Hi-Speed USB logo. USB 2.0 was released in April 2000, adding a higher maximum signaling rate of 480 Mbit/s (maximum theoretical data throughput 53 MByte/s [25]) named High Speed or High Bandwidth, in addition to the USB 1.x Full Speed signaling rate of 12 Mbit/s (maximum theoretical data throughput 1.2 MByte/s). [26]

  7. USB 3.0 - Wikipedia

    en.wikipedia.org/wiki/USB_3.0

    In USB 3.0, dual-bus architecture is used to allow both USB 2.0 (Full Speed, Low Speed, or High Speed) and USB 3.0 (SuperSpeed) operations to take place simultaneously, thus providing backward compatibility. The structural topology is the same, consisting of a tiered star topology with a root hub at level 0 and hubs at lower levels to provide ...

  8. USB mass storage device class - Wikipedia

    en.wikipedia.org/wiki/USB_mass_storage_device_class

    The Linux kernel has supported USB mass-storage devices since its 2.4 series (2001), and a backport to kernel 2.2.18 [2] has been made. In Linux, more features exist in addition to the generic drivers for USB mass-storage device class devices, including quirks, bug fixes and additional functionality for devices and controllers (vendor-enabled functions such as ATA command pass-through for ATA ...

  9. IEEE 1394 - Wikipedia

    en.wikipedia.org/wiki/IEEE_1394

    1394a, half-duplex 100–400 Mbit/s (12.5–50 MB/s) 1394b and later, full-duplex 800–3200 Mbit/s (100–400 MB/s) IEEE 1394 is an interface standard for a serial bus for high-speed communications and isochronous real-time data transfer. It was developed in the late 1980s and early 1990s by Apple in cooperation with a number of companies ...

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