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  2. CPU cache - Wikipedia

    en.wikipedia.org/wiki/CPU_cache

    A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. [1] A cache is a smaller, faster memory, located closer to a processor core, which stores copies of the data from frequently used main memory locations.

  3. Memory hierarchy - Wikipedia

    en.wikipedia.org/wiki/Memory_hierarchy

    Level 2 (L2) Instruction and data (shared) – 1 MiB [citation needed] [original research] in size. Best access speed is around 200 GB/s [9] Level 3 (L3) Shared cache – 6 MiB [citation needed] [original research] in size. Best access speed is around 100 GB/s [9] Level 4 (L4) Shared cache – 128 MiB [citation needed] [original research] in size.

  4. Victim cache - Wikipedia

    en.wikipedia.org/wiki/Victim_cache

    A victim cache is a small, typically fully associative cache placed in the refill path of a CPU cache. It stores all the blocks evicted from that level of cache and was originally proposed in 1990. In modern architectures, this function is typically performed by Level 3 or Level 4 caches.

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  6. Cache hierarchy - Wikipedia

    en.wikipedia.org/wiki/Cache_hierarchy

    Cache hierarchy, or multi-level cache, is a memory architecture that uses a hierarchy of memory stores based on varying access speeds to cache data. Highly requested data is cached in high-speed access memory stores, allowing swifter access by central processing unit (CPU) cores.

  7. Cache replacement policies - Wikipedia

    en.wikipedia.org/wiki/Cache_replacement_policies

    If the sampled cache is full and a line needs to be discarded, the RDP is instructed that the PC that last accessed it produces streaming accesses. On an access or insertion, the estimated time of reuse (ETR) for this line is updated to reflect the predicted reuse distance. On a cache miss, the line with the highest ETR value is evicted.

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    Enjoy a classic game of Hearts and watch out for the Queen of Spades!

  9. Average memory access time - Wikipedia

    en.wikipedia.org/wiki/Average_memory_access_time

    AMAT's three parameters hit time (or hit latency), miss rate, and miss penalty provide a quick analysis of memory systems. Hit latency (H) is the time to hit in the cache. Miss rate (MR) is the frequency of cache misses, while average miss penalty (AMP) is the cost of a cache miss in terms of time. Concretely it can be defined as follows.