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  2. SATA - Wikipedia

    en.wikipedia.org/wiki/SATA

    A 3.5-inch Serial ATA hard disk drive A 2.5-inch Serial ATA solid-state drive. SATA was announced in 2000 [4] [5] in order to provide several advantages over the earlier PATA interface such as reduced cable size and cost (seven conductors instead of 40 or 80), native hot swapping, faster data transfer through higher signaling rates, and more efficient transfer through an (optional) I/O queuing ...

  3. List of AMD chipsets - Wikipedia

    en.wikipedia.org/wiki/List_of_AMD_chipsets

    SATA USB 2.0 + 1.1 Parallel ATA 1 RAID NIC Package TDP Features / Notes AMD 480/570/580/690 CrossFire Chipset SB600: 2006 130 4 × 3 Gbit/s AHCI 1.1 SATA Revision 2.0: 10 + 0 1 × ATA/133 0,1,10 No 548-pin FC-BGA: 4.0 AMD 700 chipset series: SB700: Q1 2008 6 × 3 Gbit/s AHCI 1.1 SATA Revision 2.0: 12 + 2 1 × ATA/133 No 4.5 DASH 1.0 SB700S ...

  4. SATA Express - Wikipedia

    en.wikipedia.org/wiki/SATA_Express

    [3] [6] The SATA revision 3.2 specification, in its gold revision as of August 2013, standardizes the SATA Express and specifies its hardware layout and electrical parameters. [1] [30] The choice of PCI Express also enables scaling up the performance of SATA Express interface by using multiple lanes and different versions of PCI Express.

  5. List of interface bit rates - Wikipedia

    en.wikipedia.org/wiki/List_of_interface_bit_rates

    Device interfaces where one bus transfers data via another will be limited to the throughput of the slowest interface, at best. For instance, SATA revision 3.0 (6 Gbit/s) controllers on one PCI Express 2.0 (5 Gbit/s) channel will be limited to the 5 Gbit/s rate and have to employ more channels to get around this problem. Early implementations ...

  6. M.2 - Wikipedia

    en.wikipedia.org/wiki/M.2

    The SATA revision 3.2 specification, in its gold revision as of August 2013, standardizes M.2 as a new format for storage devices and specifies its hardware layout. [2]: 12 [8] Buses exposed through the M.2 connector include PCI Express (PCIe) 3.0 and newer, Serial ATA (SATA) 3.0 and USB 3.0; all these standards are backward compatible.

  7. ACPI - Wikipedia

    en.wikipedia.org/wiki/ACPI

    In September 2004, revision 3.0 was released, bringing to the ACPI specification support for SATA interfaces, PCI Express bus, multiprocessor support for more than 256 processors, ambient light sensors and user-presence devices, as well as extending the thermal model beyond the previous processor-centric support.

  8. Trim (computing) - Wikipedia

    en.wikipedia.org/wiki/Trim_(computing)

    The ATA standard is supported by both parallel (IDE, PATA) and serial (SATA) ATA hardware. A drawback of the original ATA TRIM command is that it was defined as a non-queueable command and therefore could not easily be mixed with a normal workload of queued read and write operations. SATA 3.1 introduced a queued TRIM command to remedy this. [70]

  9. COM Express - Wikipedia

    en.wikipedia.org/wiki/COM_Express

    The COM Express specification is hosted by PICMG. It is not freely available but a paper copy may be purchased for $150USD from the PICMG website. [3] However, the COM Express Design Guide is free to download. The original revision 1.0 was released July 10, 2005. Revision 3.0 (PICMG COM.0 R3.0) was released in March 2017.

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