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The straight ring counter has the logical structure shown here: Instead of the reset line setting up the initial one-hot pattern, the straight ring is sometimes made self-initializing by the use of a distributed feedback gate across all of the outputs except that last, so that a 1 is presented at the input when there is no 1 in any stage but the last.
A 4-bit ring counter using D-type flip flops is an example of synchronous logic. Each device is connected to the clock signal, and update together. Main article: synchronous logic
An asynchronous (ripple) counter is a "chain" of toggle (T) flip-flops in which the least-significant flip-flop (bit 0) is clocked by an external signal (the counter input clock), and all other flip-flops are clocked by the output of the nearest, less significant flip-flop (e.g., bit 0 clocks the bit 1 flip-flop, bit 1 clocks the bit 2 flip ...
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ENIAC used ten-position ring counters to store digits; each digit required 36 vacuum tubes, 10 of which were the dual triodes making up the flip-flops of the ring counter. Arithmetic was performed by "counting" pulses with the ring counters and generating carry pulses if the counter "wrapped around", the idea being to electronically emulate the ...
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