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For an NPN open emitter output, the collector is connected to the positive voltage rail, so the emitter outputs a high voltage when the transistor is on and is hi-Z when off. For a PNP open emitter output, the collector is connected to the low voltage supply, so the emitter outputs a low voltage when the transistor is on and is hi-Z when off.
A common variation omits the collector resistor of the output transistor, making an open-collector output. This allows the designer to fabricate wired logic by connecting the open-collector outputs of several logic gates together and providing a single external pull-up resistor. If any of the logic gates becomes logic low (transistor conducting ...
The output open collector transistor, T11, can sink currents up to 100 mA, and is protected from polarity reversal with a reverse diode. [4] [5] The circuit does not provide protection against excessive current or overheating. [4] [5]
open-collector 14 SN74LS03: 74x05 6 hex inverter gate open-collector 14 SN74LS05: 74x06 6 hex inverter gate open-collector 30 V / 40 mA 14 SN74LS06: 74x07 6 hex buffer gate: open-collector 30 V / 40 mA 14 SN74LS07: 74x08 4 quad 2-input AND gate: 14 SN74LS08: 74x09 4 quad 2-input AND gate open-collector 14 SN74LS09: 74x10 3 triple 3-input NAND ...
See also: Diode logic § Active-high AND logic gate Open-collector buffers connected as wired AND.. The wired AND connection is a form of AND gate.When using open collector or similar outputs (which can be identified by the ⎐ symbol in schematics), wired AND only requires a pull up resistor on the shared output wire.
The output of an inverter is at the collector. Likewise, it is either a current sink (low logic level) or a high-z floating condition (high logic level). Like direct-coupled transistor logic, there is no resistor between the output (collector) of one NPN transistor and the input (base) of the following transistor.
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A 555 timer can act as an active-low SR latch (though without an inverted Q output) with two outputs: output pin is a push-pull output, discharge pin is an open-collector output (requires a pull-up resistor). For the schematic on the right, a Reset input signal connects to the RESET pin and connecting a Set input signal to the TR pin.