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For an NPN open emitter output, the collector is connected to the positive voltage rail, so the emitter outputs a high voltage when the transistor is on and is hi-Z when off. For a PNP open emitter output, the collector is connected to the low voltage supply, so the emitter outputs a low voltage when the transistor is on and is hi-Z when off.
open-collector 14 SN74LS12: 74x13 2 dual 4-input NAND gate Schmitt trigger: 14 SN74LS13: 74x14 6 hex inverter gate Schmitt trigger 14 SN74LS14: 74x15 3 triple 3-input AND gate open-collector 14 SN74LS15: 74x16 6 hex inverter gate open-collector 15 V / 40 mA 14 SN7416: 74x17 6 hex buffer gate open-collector 15 V / 40 mA 14 SN7417: 74x18 2
[6] [page needed] The headings in the following table are: V cc – power-supply voltage; t pd – maximum gate delay; I OL – maximum output current at low level; I OH – maximum output current at high level; t pd, I OL, and I OH apply to most gates in a given family. Driver or buffer gates have higher output currents.
See also: Diode logic § Active-high AND logic gate Open-collector buffers connected as wired AND.. The wired AND connection is a form of AND gate.When using open collector or similar outputs (which can be identified by the ⎐ symbol in schematics), wired AND only requires a pull up resistor on the shared output wire.
The output open collector transistor, T11, can sink currents up to 100 mA, and is protected from polarity reversal with a reverse diode. [4] [5] The circuit does not provide protection against excessive current or overheating. [4] [5]
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The following is a list of CMOS 4000-series digital logic integrated circuits.In 1968, the original 4000-series was introduced by RCA.Although more recent parts are considerably faster, the 4000 devices operate over a wide power supply range (3V to 18V recommended range for "B" series) and are well suited to unregulated battery powered applications and interfacing with sensitive analogue ...
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