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A minifloat in 1 byte (8 bit) with 1 sign bit, 4 exponent bits and 3 significand bits (in short, a 1.4.3 minifloat) is demonstrated here. The exponent bias is defined as 7 to center the values around 1 to match other IEEE 754 floats [ 3 ] [ 4 ] so (for most values) the actual multiplier for exponent x is 2 x −7 .
The 80-bit floating-point format has a range (including subnormals) from approximately 3.65 × 10 −4951 to 1.18 × 10 +4932. Although log 10 ( 2 64) ≈ 19.266, this format is usually described as giving approximately eighteen significant digits of precision (the floor of log 10 ( 2 63), the minimum guaranteed precision).
The IEEE Standard for Floating-Point Arithmetic (IEEE 754) is a technical standard for floating-point arithmetic originally established in 1985 by the Institute of Electrical and Electronics Engineers (IEEE). The standard addressed many problems found in the diverse floating-point implementations that made them difficult to use reliably and ...
A floating-point variable can represent a wider range of numbers than a fixed-point variable of the same bit width at the cost of precision. A signed 32-bit integer variable has a maximum value of 2 31 − 1 = 2,147,483,647, whereas an IEEE 754 32-bit base-2 floating-point variable has a maximum value of (2 − 2 −23) × 2 127 ≈ 3.4028235 ...
On a typical computer system, a double-precision (64-bit) binary floating-point number has a coefficient of 53 bits (including 1 implied bit), an exponent of 11 bits, and 1 sign bit. Since 2 10 = 1024, the complete range of the positive normal floating-point numbers in this format is from 2 −1022 ≈ 2 × 10 −308 to approximately 2 1024 ≈ ...
The VAX processor implemented non-IEEE quadruple-precision floating point as its "H Floating-point" format. It had one sign bit, a 15-bit exponent and 112-fraction bits, however the layout in memory was significantly different from IEEE quadruple precision and the exponent bias also differed.
As an 8-bit exponent was not wide enough for some operations desired for double-precision numbers, e.g. to store the product of two 32-bit numbers, [20] both Kahan's proposal and a counter-proposal by DEC therefore used 11 bits, like the time-tested 60-bit floating-point format of the CDC 6600 from 1965.
The otherwise binary Wang VS machine supported a 64-bit decimal floating-point format in 1977. [2] The Motorola 68881 supported a format with 17 digits of mantissa and 3 of exponent in 1984, with the floating-point support library for the Motorola 68040 processor providing a compatible 96-bit decimal floating-point storage format in 1990. [2]