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The goal of LLD or a low-level design document (LLDD) is to give the internal logical design of the actual program code. Low-level design is created based on the high-level design. LLD describes the class diagrams with the methods and relations between classes and program specs.
A high-level design document or HLDD adds the necessary details to the current project description to represent a suitable model for building. This document includes a high-level architecture diagram depicting the structure of the system, such as the hardware, database architecture, application architecture (layers), application flow ...
From design, each requirement must be addressed in every single document in the software process. The documents include the HLD, LLD, source codes, unit test cases, integration test cases and the system test cases. In a requirements traceability matrix, the rows will have the requirements. The columns represent each document.
Federation Object Model (FOM): A document that specifies object classes, interaction classes, data types and additional data that is used for the information exchange in a federation. A FOM is an XML file that follows the format of the HLA Object Model Template and the associated XML Schema.
In documentation, a high-level document contains the executive summary, the low-level documents the technical specifications. In business, corporate strategy is a high-level description, a list of who does what jobs is a low-level description.
This work is free software; you can redistribute it and/or modify it under the terms of the GNU Affero General Public License as published by the Free Software Foundation; either version 3 of the License, or any later version.
In computer engineering, a hardware description language (HDL) is a specialized computer language used to describe the structure and behavior of electronic circuits, usually to design application-specific integrated circuits (ASICs) and to program field-programmable gate arrays (FPGAs).
In integrated circuit design, Library Exchange Format (LEF) is a specification for representing the physical layout of an integrated circuit in an ASCII format. It includes design rules and abstract information about the standard cells. [1] [2] LEF only has the basic information required at that level to serve the purpose of the concerned CAD ...