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List of free analog and digital electronic circuit simulators, available for Windows, macOS, Linux, and comparing against UC Berkeley SPICE. The following table is split into two groups based on whether it has a graphical visual interface or not.
sigrok is a portable, cross-platform, free open source signal analysis software suite that supports various device types, such as logic analyzers, MSOs, oscilloscopes, multimeters, LCR meters, sound level meters, thermometers, hygrometers, anemometers, light meters, DAQs, data loggers, function generators, spectrum analyzers, power supplies, IEEE-488 (GPIB) interfaces, and more.
Elenco LP-560 logic probe. It has a red LED for high state, green LED for low state, amber LED for pulsing state, and a changing audible tone. [1] A logic probe is a low-cost hand-held test probe used for analyzing and troubleshooting the logical states (boolean 0 or 1) of a digital circuit.
CircuitLogix is a software electronic circuit simulator which uses PSpice to simulate thousands of electronic devices, models, and circuits. CircuitLogix supports analog , digital , and mixed-signal circuits, and its SPICE simulation gives accurate real-world results.
Cadence recommends Incisive Enterprise Simulator for new design projects, as XL no longer receives active development. Nevertheless, XL continues to find use in companies with large codebases of legacy Verilog. Many early Verilog codebases will only simulate properly in Verilog-XL, due to variation in language implementation of other simulators.
Logic analyzer. A logic analyzer is an electronic instrument that captures and displays multiple logic signals from a digital system or digital circuit.A logic analyzer may convert the captured data into timing diagrams, protocol decodes, state machine traces, opcodes, or may correlate opcodes with source-level software.
Logic simulation is the use of simulation software to predict the behavior of digital circuits and hardware description languages. [ 1 ] [ 2 ] Simulation can be performed at varying degrees of physical abstraction , such as at the transistor level , gate level , register-transfer level (RTL), electronic system-level (ESL), or behavioral level.
The fail log typically contains information about when (e.g., tester cycle), where (e.g., at what tester channel), and how (e.g., logic value) the test failed. Diagnostics attempt to derive from the fail log at which logical/physical location inside the chip the problem most likely started.