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2. Memory paging - Wikipedia

   en.wikipedia.org/wiki/Memory_paging

   An example is a 32-bit x86 processor with 4 GB and without Physical Address Extension (PAE). In this case, the processor is able to address all the RAM installed and no more. However, even in this case, paging can be used to support more virtual memory than physical memory. For instance, many programs may be running concurrently.

3. Page (computer memory) - Wikipedia

   en.wikipedia.org/wiki/Page_(computer_memory)

   A system with a smaller page size uses more pages, requiring a page table that occupies more space. For example, if a 2 32 virtual address space is mapped to 4 KiB (2 12 bytes) pages, the number of virtual pages is 2 20 = (2 32 / 2 12). However, if the page size is increased to 32 KiB (2 15 bytes), only 2 17 pages are required. A multi-level ...

4. Physical Address Extension - Wikipedia

   en.wikipedia.org/wiki/Physical_Address_Extension

   Some chipsets do not support physical memory addresses above 4 GB (FFFFFFFF in hexadecimal), and some motherboards simply do not have enough RAM sockets to allow the installation of more than 4 GB of RAM. Nevertheless, even if no more than 4 GB of RAM is available and accessible, a PAE-capable CPU may be run in PAE mode, for example to allow ...

5. Page Size Extension - Wikipedia

   en.wikipedia.org/wiki/Page_Size_Extension

   The entries in the page directory have an additional flag, in bit 7, named PS (for page size). This flag was ignored without PSE, but now, the page-directory entry with PS set to 1 does not point to a page table, but to a single large 4 MiB page. The page-directory entry with PS set to 0 behaves as without PSE.

6. Intel 5-level paging - Wikipedia

   en.wikipedia.org/wiki/Intel_5-level_paging

   Intel 5-level paging, referred to simply as 5-level paging in Intel documents, is a processor extension for the x86-64 line of processors. [1]: 11 It extends the size of virtual addresses from 48 bits to 57 bits by adding an additional level to x86-64's multilevel page tables, increasing the addressable virtual memory from 256 TiB to 128 PiB.

7. Memory management unit - Wikipedia

   en.wikipedia.org/wiki/Memory_management_unit

   A 68451 MMU, which could be used with the Motorola 68010. A memory management unit (MMU), sometimes called paged memory management unit (PMMU), [1] is a computer hardware unit that examines all memory references on the memory bus, translating these requests, known as virtual memory addresses, into physical addresses in main memory.