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Unfolding has applications in designing high-speed and low-power ASIC architectures. One application is to unfold the program to reveal hidden concurrency so that the program can be scheduled to a smaller iteration period, thus increasing the throughput of the implementation. Another application is parallel processing in word level or bit level.
The DSP implementation in the folding algorithm is a Data flow graph(DFG), which is a graph composed of functional nodes and delay edges. Another input for folding algorithm is folding set which is the function maps an operation unit of original DFG to an operation of transformed DFG with the number n <= N indicated the order of reused operation.
Digital signal processing (DSP) is the use of digital processing, such as by computers or more specialized digital signal processors, to perform a wide variety of signal processing operations. The digital signals processed in this manner are a sequence of numbers that represent samples of a continuous variable in a domain such as time, space ...
A makeshift to achieve a real-time requirement in multidimensional DSP applications is to use a lower sampling rate, which can efficiently reduce the number of samples to be processed at one time and thereby decrease the total processing time. However, this can lead to the aliasing problem due to the sampling theorem and poor-quality outputs ...
Then, the output sample y(n) can be computed in terms of the inputs and the output sample y(n − M) such that there are M delay elements in the critical loop. These elements are then used to pipeline the critical loop by M stages so that the sample rate can be increased by a factor M. Consider the 1st-order IIR filter transfer function
For example, elements can use real or integer values to simulate DSP functions or sampled data filters. Because the event-driven algorithm is faster than the standard SPICE matrix solution, simulation time is greatly reduced for circuits that use event-driven models in place of analog models.
Many DSP applications have constraints on latency; that is, for the system to work, the DSP operation must be completed within some fixed time, and deferred (or batch) processing is not viable. Most general-purpose microprocessors and operating systems can execute DSP algorithms successfully, but are not suitable for use in portable devices ...
TI-RTOS is an embedded tools ecosystem created and offered by Texas Instruments (TI) for use across a range of their embedded system processors. It includes a real-time operating system (RTOS) component-named TI-RTOS Kernel (formerly named SYS/BIOS, which evolved from DSP/BIOS), networking connectivity stacks, power management, file systems, instrumentation, and inter-processor communications ...