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The Asus VivoBook 4K uses a 15.6" 16:9 IPS 4K (3840 x 2160) display with a color gamut of 72% NTSC, 100% sRGB, and 74% Adobe RGB. The laptop supports up to Intel Core i7 processor, up to 12 GB of RAM, up to a 2 TB HDD and up to a Nvidia 940M video card.
DDR4 RAM operates at a voltage of 1.2 V and supports frequencies between 800 and 1600 MHz (DDR4-1600 through DDR4-3200). Compared to DDR3, which operates at 1.5 V with frequencies from 400 to 1067 MHz (DDR3-800 through DDR3-2133), DDR4 offers better performance and energy efficiency. DDR4 speeds are advertised as double the base clock rate due ...
Also, each module has eight RAM chips, but the lower one has an unoccupied space for the ninth chip; this space is occupied in ECC DIMMs. Three SDRAM DIMM slots on a ABIT BP6 computer motherboard. A DIMM ( Dual In-Line Memory Module ) is a popular type of memory module used in computers.
By 2017 the EeeBook lineup was succeeded by the Asus VivoBook E Series. Some EeeBook laptops were rebranded to VivoBook E Series laptops such as the EeeBook E202 was rebranded to the VivoBook E202 and the EeeBook E402 to the VivoBook E402. The EeeBook lineup consists of the E202 (E202SA), E402 (E402MA), E502 (E502SA and E502MA) and X205 (X205TA)
DDR SDRAM specification was finalized by JEDEC in June 2000 (JESD79). [9] JEDEC has set standards for the data rates of DDR SDRAM, divided into two parts. The first specification is for memory chips, and the second is for memory modules. The first retail PC motherboard using DDR SDRAM was released in August 2000. [10]
Software can "partition" a portion of a computer's RAM, allowing it to act as a much faster hard drive that is called a RAM disk. A RAM disk loses the stored data when the computer is shut down, unless memory is arranged to have a standby battery source, or changes to the RAM disk are written out to a nonvolatile disk.
Memory timings or RAM timings describe the timing information of a memory module or the onboard LPDDRx. Due to the inherent qualities of VLSI and microelectronics, memory chips require time to fully execute commands. Executing commands too quickly will result in data corruption and results in system instability.
A notable omission from the specification was per-byte write enables; it was designed for systems with caches and ECC memory, which always write in multiples of a cache line. Additional commands (with CMD5 set) opened and closed rows without a data transfer, performed refresh operations, read or wrote configuration registers, and performed ...