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A logic gate is a device that performs a Boolean function, ... The simplest family of logic gates uses bipolar transistors, and is called resistor–transistor logic ...
This allows the designer to fabricate wired logic by connecting the open-collector outputs of several logic gates together and providing a single external pull-up resistor. If any of the logic gates becomes logic low (transistor conducting), the combined output will be low. Examples of this type of gate are the 7401 [15] and 7403 [16] series.
Diode logic (or diode-resistor logic) constructs AND and OR logic gates with diodes and resistors. An active device ( vacuum tubes with control grids in early electronic computers , then transistors in diode–transistor logic ) is additionally required to provide logical inversion (NOT) for functional completeness and amplification for voltage ...
Schematic of basic two-input DTL NAND gate. R3, R4 and V− shift the positive output voltage of the input DL stage below the ground (to cut off the transistor at low input voltage). Diode–transistor logic (DTL) is a class of digital circuits that is the direct ancestor of transistor–transistor logic.
Processing speed can also be improved due to the relatively low resistance compared to the NMOS-only or PMOS-only type devices. Inverters can also be constructed with bipolar junction transistors (BJT) in either a resistor–transistor logic (RTL) or a transistor–transistor logic (TTL) configuration.
A logic gate consists of up to about 20 transistors, whereas an advanced microprocessor, as of 2023, may contain as many as 134 billion transistors (and for exceptional chips, 2.6 trillion transistors, as of 2020). [91] Transistors are often organized into logic gates in microprocessors to perform computation. [92]
In logic families like TTL, NMOS, PMOS and CMOS, an AND gate is built from a NAND gate followed by an inverter. In the CMOS implementation above, transistors T1-T4 realize the NAND gate and transistors T5 and T6 the inverter. The need for an inverter makes AND gates less efficient than NAND gates.
The R-pulled circuit acts like a NOR gate that sinks OUT to the GND. As an example, here is a NOR gate implemented in schematic NMOS. If either input A or input B is high (logic 1, = True), the respective MOS transistor acts as a very low resistance between the output and the negative supply, forcing the output to be low (logic 0, = False).