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Microarchitecture simulation is an important technique in computer architecture research and computer science education. It is a tool for modeling the design and behavior of a microprocessor and its components, such as the ALU , cache memory , control unit , and data path, among others.
List of free analog and digital electronic circuit simulators, available for Windows, macOS, Linux, and comparing against UC Berkeley SPICE. The following table is split into two groups based on whether it has a graphical visual interface or not.
A cycle-accurate simulator is a computer program that simulates a microarchitecture on a cycle-by-cycle basis. In contrast an instruction set simulator simulates an instruction set architecture usually faster but not cycle-accurate to a specific implementation of this architecture; they are often used when emulating older hardware, where time precision is important for legacy reasons.
Scilab - free open-source software for numerical computation and simulation similar to MATLAB/Simulink. Sim4Life.lite - online version of Sim4Life that is free-of-charge for students for team-learning and online collaboration with classmates and teachers on limited size projects.
AMD was the first to introduce the instructions that now form Intel's BMI1 as part of its ABM (Advanced Bit Manipulation) instruction set, then later added support for Intel's new BMI2 instructions. AMD today advertises the availability of these features via Intel's BMI1 and BMI2 cpuflags and instructs programmers to target them accordingly.
PhET Interactive Simulations is part of the University of Colorado Boulder which is a member of the Association of American Universities. [10] The team changes over time and has about 16 members consisting of professors, post-doctoral students, researchers, education specialists, software engineers (sometimes contractors), educators, and administrative assistants. [11]
Cycle based simulator originally developed at DEC. The DEC developers spun off to form Quickturn Design Systems. Quickturn was later acquired by Cadence, who discontinued the product in 2005. Speedsim featured an innovative slotted bit-slice architecture that supported simulation of up to 32 tests in parallel. Super-FinSim: Fintronic: V2001
There is a freely available MIPS32 simulator (earlier versions simulated only the R2000/R3000) called SPIM for use in education. EduMIPS64 [50] is a GPL graphical cross-platform MIPS64 CPU simulator, written in Java/Swing. It supports a wide subset of the MIPS64 ISA and allows the user to graphically see what happens in the pipeline when an ...