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  2. Analog delay line - Wikipedia

    en.wikipedia.org/wiki/Analog_delay_line

    Analog delay lines are applied in many types of signal processing circuits; for example the PAL television standard uses an analog delay line to store an entire video scanline. Acoustic and electromechanical delay lines are used to provide a " reverberation " effect in musical instrument amplifiers, or to simulate an echo.

  3. Delay-locked loop - Wikipedia

    en.wikipedia.org/wiki/Delay-locked_loop

    The input of the chain (and thus of the DLL) is connected to the clock that is to be negatively delayed. A multiplexer is connected to each stage of the delay chain; a control circuit automatically updates the selector of this multiplexer to produce the negative delay effect. The output of the DLL is the resulting, negatively delayed clock signal.

  4. Digital delay line - Wikipedia

    en.wikipedia.org/wiki/Digital_delay_line

    A digital delay line (or simply delay line, also called delay filter) is a discrete element in a digital filter, which allows a signal to be delayed by a number of samples. Delay lines are commonly used to delay audio signals feeding loudspeakers to compensate for the speed of sound in air, and to align video signals with accompanying audio ...

  5. TL431 - Wikipedia

    en.wikipedia.org/wiki/TL431

    Basic fixed-threshold comparator and its derivatives - simple time delay relay and cascaded window monitor. To ensure fast turn-off transients, load resistor RL should provide on-state current of at least 5 mA [39] The simplest TL431-based comparator circuit requires a single external resistor to limit I CA at around 5 mA. [39]

  6. Wiring diagram - Wikipedia

    en.wikipedia.org/wiki/Wiring_diagram

    These details may not be so easily found on a more schematic drawing. A wiring diagram is a simplified conventional pictorial representation of an electrical circuit. It shows the components of the circuit as simplified shapes, and the power and signal connections between the devices.

  7. Lattice delay network - Wikipedia

    en.wikipedia.org/wiki/Lattice_delay_network

    The first example gives the circuit for a 6th order maximally flat delay. Circuit values for z a and z b for a normalized lattice (with z b the dual of z a) were given earlier. However, in this example the alternative version of z b is used, so that an unbalanced alternative can be easily produced. The circuit is

  8. Delay calculation - Wikipedia

    en.wikipedia.org/wiki/Delay_calculation

    By contrast, static timing analysis computes the delays of entire paths, using delay calculation to determine the delay of each gate and wire. There are many methods used for delay calculation for the gate itself. The choice depends primarily on the speed and accuracy required: Circuit simulators such as SPICE may be used. This is the most ...

  9. Lattice and bridged-T equalizers - Wikipedia

    en.wikipedia.org/wiki/Lattice_and_bridged-T...

    An example of a “waveform corrector” for a coaxial cable section for video frequencies [5] is shown. The shunt impedance Z2 is not shown in detail. It is the dual of Z1, so whereas Z1 contains a series resonant circuit and an R-C ladder network, Z2 contains a shunt resonant circuit and an R-L ladder network. Example of waveform corrector

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